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PDF NL160120AM27-33A Data sheet ( Hoja de datos )

Número de pieza NL160120AM27-33A
Descripción TFT MONOCHROME LCD MODULE
Fabricantes NLT 
Logotipo NLT Logotipo



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TFT MONOCHROME LCD MODULE
NL160120AM27-33A
54 cm (21.3 Type)
UXGA
LVDS Interface (2 port)
DATA SHEET
DOD-PP-1540 (1st edition)
This DATA SHEET is updated document from
PRELIMINARY DATA SHEET DOD-PP-1264(1).
All information is subject to change without
notice. Please confirm the sales representative
before starting to design your system.
Document Number: DOD-PP-1540 (1st edition)
Published date: December 2012 CP (N)
1
© NLT Technologies, Ltd.
2012 All rights reserved.

1 page




NL160120AM27-33A pdf
NL160120AM27-33A
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
432.0 (H) × 324.0 (V) mm
54 cm (21.3 inches)
a-Si TFT active matrix
256 gray scales per 1 sub-pixel (8-bit) (766 gray scales per 1 pixel)
1,600 (H) × 1,200 (V) pixels (1 pixel consists of 3 sub-pixels (LCR).)
LCR vertical stripe
0.090 (H) × 0.270 (V) mm
0.270 (H) × 0.270 (V) mm
457.0 (W) × 350.0 (H) × 21.5 (D) mm (typ.)
2,700 g (typ.)
1,400:1 (typ.)
Viewing angle
Designed viewing direction
Polarizer surface
At the contrast ratio 10:1
Horizontal: Right side 88° (typ.), Left side 88° (typ.)
Vertical: Up side 88° (typ.), Down side 88° (typ.)
Viewing angle with optimum grayscale (γDICOM): normal axis
(perpendicular)
Antiglare
Note1
Polarizer pencil-hardness
Response time
Luminance
2H (min.) [by JIS K5600]
Ton+Toff (10%←→ 90%)
40 ms (typ.)
At the maximum luminance
1,900 cd/m2 (typ.)
Signal system
2 ports LVDS interface (THC63LVD824A THine Electronics, Inc.
or equivalent)
[LCR 8-bit signals, Data enable signal (DE), Dot clock (CK)]
Power supply voltage
LCD panel signal processing board: 12.0V
LED driver board: 12.0V
Backlight
LED backlight type with LED driver board
Power consumption
At checkered flag pattern, the maximum luminance
36.0 W (typ.)
Note1: When the product luminance is 450cd/m2, the gamma characteristic is designed to γDICOM.
DATA SHEET DOD-PP-1540 (1st edition)
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NL160120AM27-33A arduino
NL160120AM27-33A
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
ON OFF
VDD
Note1
10.8V
0V
0.1ms < Tr < 80ms
9.6V 10.8V
VDD dip < 20ms
LVDS Signals *1,*2
Note2
0V
VALID period
ON
10.8V
Toff > 200ms
t > 10ms
t> 10ms
t 450ms
Display on screen
0ms < t < 35ms
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/- and CKB+/-
*2: LVDS signals should be measured at the terminal of 100Ω resistance.
Note1: If there is a voltage variation (voltage drop) at the rising edge of VCC below 10.8V, there is a
possibility that a product does not work due to a protection circuit.
Note2: LVDS signals must be set to Low or High-impedance, except the VALID period (See above
sequence diagram), in order to avoid the circuitry damage.
If some of signals are cut while this product is working, even if the signal input to it once again,
it might not work normally. If a customer stops the display and function signals, VCC also must
be shut down.
Note3: The backlight should be turned on within the valid period of LVDS signals, in order to avoid
unstable data display.
4.4.2 LED driver board
Voltage
12.0V
VDDB 11.4V
0.1ms < tr 100 ms
OFF ON
11.4V
0V
BRTC
0ms < t
200ms < t
0ms < t
Under than 1.2V
Time
Note1: The backlight should be turned on within the valid period of LVDS signals, in order to avoid
unstable data display.
Note2: If tr is more than 100ms, the backlight will be turned off by a protection circuit for LED
driver board.
Note3: When VDDB is 0V or BRTC is Low, PWSEL must be set to Low or Open.
DATA SHEET DOD-PP-1540 (1st edition)
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