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PDF NCP6132A Data sheet ( Hoja de datos )
| Número de pieza | NCP6132A | |
| Descripción | Dual Output 3 Phase & 2 Phase Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NCP6132A, NCP6132B
Product Preview
Dual Output 3 Phase & 2
Phase Controller with
Single SVID Interface for
Desktop and Notebook CPU
http://onsemi.com
Applications
The NCP6132A/NCP6132B dual output three plus two phase buck
solution is optimized for Intel IMVP−7 and VR12 compatible CPUs.
The controller combines true differential voltage sensing, differential
inductor DCR current sensing, input voltage feed−forward, and
adaptive voltage positioning to provide accurately regulated power for
both Desktop and Notebook applications. The control system is based
on Dual−Edge pulse−width modulation (PWM) combined with DCR
current sensing providing the fastest initial response to dynamic load
events and reduced system cost. It also sheds to single phase during
light load operation and can auto frequency scale in light load while
maintaining excellent transient performance.
There are three internal MOSFET drivers inside the chip. One of
these three integrated driver can be configured either to drive core
phase or aux phase. NCP6132A and NCP6132B have almost same
structure except that NCP6132A has two integrated drivers for the
core rail and one integrated driver for auxiliary rail, while the
NCP6132B has all three integrated drivers for the core rail.
MARKING
DIAGRAM
1
1 60
QFN60
CASE 485BB
NCP6132x
AWLYYWWG
x = A or B
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
NCP6132AMNR2G
NCP6132BMNR2G
Package
QFN60
(Pb−Free)
Shipping†
2500/Tape
& Reel
Features
• Meets Intel’s VR12/IMVP7 Specifications
• Three Phase CPU Voltage Regulator, and Two Phase Auxiliary
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Voltage Regulator, with Three Internal MOSFET Drivers in Total
• Current Mode Dual Edge Modulation for Fastest Initial Response to
Transient Loading
• Dual High Performance Operational Error Amplifier
• One Digital Soft Start Ramp for Both Rails
• Dynamic Reference Injection
• Adaptive Voltage Positioning (AVP)
• Accurate Total Summing Current Amplifier
• Vin Feed Forward Ramp Slope
• DAC with Droop Feed−forward Injection
• Pin Programming for Internal SVID Parameters
• Dual High Impedance Differential Voltage and Total
• Over Voltage Protection (OVP) & Under Voltage
Current Sense Amplifiers
Protection (UVP)
• Phase−to−Phase Dynamic Current Balancing
• Over Current Protection (OCP)
• “Lossless” DCR Current Sensing for Current Balancing
• Dual Power Good Output with Internal Delays
• Summed Thermally Compensated Inductor Current
• Pb−free and Halide−free Packages are Available
Sensing for Droop
• True Differential Current Balancing Sense Amplifiers
for Each Phase
Applications
• Desktop & Notebook Processors
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2012
March, 2012 − Rev. P1
1
Publication Order Number:
NCP6132A/D
1 page  
NCP6132A, NCP6132B
ABSOLUTE MAXIMUM RATINGS
Table 2. ELECTRICAL INFORMATION
Pin Symbol
COMP, COMPA
CSCOMP, CSCOMPA
VSN, VSNA
VMAX
VCC + 0.3 V
VCC + 0.3 V
GND + 300 mV
VMIN
−0.3 V
−0.3 V
GND – 300 mV
ISOURCE
2 mA
2 mA
1 mA
ISINK
2 mA
2 mA
1 mA
DIFF, DIFFA
VRDY, VRDYA
VDDPB, VCC, PVCC
VCC + 0.3 V
VCC + 0.3 V
6.5 V
−0.3 V
−0.3 V
−0.3 V
2 mA
N/A
N/A
2 mA
2 mA
N/A
ROSC
IOUT, IOUTA Output
VCC + 0.3 V
TBD
−0.3 V
−0.3 V
1 mA
N/A
VRMP
+25 V
−0.3 V
SW1, SW2, SWA
28 V
−5 V
−10 V ≤ 200 ns
BST1, BST2, BSTA
34 V wrt/ GND
6.5 V wrt/ SW
−0.3 V wrt/ SW
LG1, LG2, LGA
VCC + 0.3 V
−0.3 V
−5 V ≤ 200 ns
HG1, HG2, HGA
BST + 0.3 V
−0.3 V wrt/ SW
−2 V ≤ 200 ns wrt/ SW
All Other Pins
VCC + 0.3 V
−0.3 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*All signals referenced to GND unless noted otherwise.
Table 3. THERMAL INFORMATION
Parameters
Thermal Characteristic
QFN Package (Note 1)
Operating Junction Temperature Range (Note 2)
Operating Ambient Temperature Range
Maximum Storage Temperature Range
Moisture Sensitivity Level
QFN Package
*The maximum package power dissipation must be observed.
1. JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM
2. JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM
Symbol
RJA
TJ
TSTG
MSL
Typical
31
−10 to +125
−10 to +100
−40 to +150
1
Units
_C/W
_C
_C
_C
http://onsemi.com
5
5 Page 
NCP6132A, NCP6132B
Table 5. ELECTRICAL CHARACTERISTICS Unless otherwise stated: −10°C < TA< 100°C; VCC = 5.0 V; CVCC = 0.1 mF
Parameter
Test Conditions
Min Typ Max
HIGH−SIDE MOSFET DRIVER
HG1, HG2, HGA Pull−Down Resistance
HG to SWBST−SW = 0 V
260
BST Quiescent Current
EN = L (shutdown)
EN = H, no switching
1.0 10
300
LOW−SIDE MOSFET DRIVER
Pull−up Resistance, Sourcing Current (Note 4)
0.9 2.0
Low Side Driver Sourcing Current
5.56
Pull−down Resistance, Sinking Current
(Note 4)
0.4 1.0
Low Side Driver Sinking Current
12.5
LG1, LG2, LGA Rise Time
3 nF load
6 16 30
LG1, LG2, LGA Fall Time
3 nF load
6 11 30
LG1, LG2, LGA Turn−On Propagation Delay
tpdhDRVL
LG1, LG2, LGA Pull−Down Resistance
PVCC Quiescent Current
CLOAD = 3 nF
LG to PGND, VCC = 5 V
EN = L (Shutdown)
EN = H, no switching
11 30
45
1.0 10
490
BOOTSTRAP RECTIFIER SWITCH
On Resistance
EN = L or EN = H and DRVL = H
5.0 9.0 14.0
3. Guaranteed by design/characterization, not in production test
4. Guaranteed by characterization
Units
kW
mA
W
A
W
A
ns
ns
ns
kW
mA
W
DRVL
tfDRVL
trDRVL
tpdhDRVH
DRVH
(WITH RESPECT TO SW)
trDRVH
VTH
SW
Figure 3. Timing Diagram
NOTE: Timing is referenced to the 90% and 10% points, unless otherwise noted.
tfDRVH
VTH
1.0V
tpdhDRVL
http://onsemi.com
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NCP6132A.PDF ] | |
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