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PDF HCTS390HMSR Data sheet ( Hoja de datos )
| Número de pieza | HCTS390HMSR | |
| Descripción | Radiation Hardened Dual Decade Ripple Counter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HCTS373MS
August 1995
Radiation Hardened
Octal Transparent Latch, Three-State
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS373MS is a Radiation Hardened octal transpar-
ent three-state latch with an active-low output enable. The out-
puts are transparent to the inputs when the Latch Enable (LE) is
HIGH. When the Latch Enable (LE) goes LOW, the data is
latched. The Output Enable (OE) controls the three-state outputs.
When the Output Enable (OE) is HIGH, the outputs are in the
high impedance state. The latch operation is independent of the
state of the Output Enable.
The HCTS373MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
The HCTS373MS is supplied in a 20 lead Ceramic flatpack (K
suffix) or a SBDIP Package (D suffix).
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
Ordering Information
PART NUMBER
HCTS373DMSR
HCTS373KMSR
HCTS373D/Sample
HCTS373K/Sample
HCTS373HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
638
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
Spec Number 518636
File Number 2131.2
1 page  
Specifications HCTS373MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current (Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
Data to Qn
LE to Qn
Enable to Output
Disable to Output
SYMBOL
(NOTES 1, 2)
CONDITIONS
ICC VCC = 5.5V, VIN = VCC or GND
IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VOL
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
VOH
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
IIN VCC = 5.5V, VIN = VCC or GND
IOZ Applied Voltage = 0V or VCC,
VCC = 5.5V
FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
TPLH VCC = 4.5V
TPHL VCC = 4.5V
TPLH VCC = 4.5V
TPHL VCC = 4.5V
TPZL VCC = 4.5V
TPZH VCC = 4.5V
TPLZ,
TPHZ
VCC = 4.5V
TEMPERATURE
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
200K RAD
LIMITS
MIN MAX
- 0.75
6.0 -
-6.0 -
- 0.1
VCC
-0.1
-
-
-
±5
±50
--
2 24
2 30
2 30
2 34
2 36
2 29
2 25
UNITS
mA
mA
mA
V
V
µA
µA
-
ns
ns
ns
ns
ns
ns
ns
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
IOZL/IOZH
5 ±200nA
Spec Number 518636
642
5 Page 
HCTS373MS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Spec Number
648
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HCTS390HMSR.PDF ] | |
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