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Intersil Corporation - Radiation Hardened Octal Transparent Latch/ Three-State

Numéro de référence HCTS373D
Description Radiation Hardened Octal Transparent Latch/ Three-State
Fabricant Intersil Corporation 
Logo Intersil Corporation 





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HCTS373D fiche technique
Data Sheet
HCTS373T
July 1999 File Number 4628.1
Radiation Hardened Octal Transparent
Latch, Three-State
Intersil’s Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HCTS373T is a Radiation Hardened Octal
Transparent Three-State Latch with an active-low output
enable. The outputs are transparent to the inputs when the
Latch Enable (LE) is HIGH. When the Latch Enable (LE)
goes LOW, the data is latched. The Output Enable (OE)
controls the three-state outputs. When the Output Enable
(OE) is HIGH, the outputs are in the high impedance state.
The latch operation is independent of the state of the Output
Enable.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HCTS373T are
contained in SMD 5962-95747. A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
NUMBER
PART
NUMBER
TEMP.
RANGE
(oC)
5962R9574701TRC
HCTS373DTR
-55 to 125
5962R9574701TXC
HCTS373KTR
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- Latch-Up Free Under Any Conditions
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9
Errors/Bit-Day (Typ)
• 3 Micron Radiation Hardened CMOS SOS
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii 5mA at VOL, VOH
Pinouts
HCTS373T (SBDIP), CDIP2-T20
TOP VIEW
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
HCTS373T (FLATPACK), CDFP4-F20
TOP VIEW
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.

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