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PDF A32200DX Data sheet ( Hoja de datos )

Número de pieza A32200DX
Descripción HiRel FPGAs
Fabricantes Actel 
Logotipo Actel Logotipo



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No Preview Available ! A32200DX Hoja de datos, Descripción, Manual

v3.0
HiRel FPGAs
Features
• Highly Predictable Performance with 100% Automatic
Placement and Routing
• Device Sizes from 1,200 to 20,000 Gates
• Up to 6 Fast, Low-Skew Clock Networks
• Up to 202 User-Programmable I/O Pins
• More Than 500 Macro Functions
• Up to 1,276 Dedicated Flip-Flops
• I/O Drive to 10 mA
• Devices Available to DSCC SMD
• CQFP and CPGA Packaging
• Nonvolatile, User Programmable
• Logic Fully Tested Prior to Shipment
• 100% Military Temperature Tested (–55°C to +125°C)
• QML Certified Devices
• Proven Reliability Data Available
• Successful Military/Avionics Supplier for Over 10 Years
ACT 3 Features
• Highest-Performance, Highest-Capacity FPGA Family
• System Performance to 60 MHz over Military Temperature
• Low-Power 0.8µ CMOS Technology
3200DX Features
• 100 MHz System Logic Integration
• Highest Speed FPGA SRAM, up to 2.5 kbits Configurable
Dual-Port SRAM
• Fast Wide-Decode Circuitry
• Low-Power 0.6µ CMOS Technology
1200XL Features
• Pin for Pin Compatible with ACT 2
• System Performance to 50 MHz over Military Temperature
• Low-Power 0.6µ CMOS Technology
ACT 2 Features
• Best-Value, High-Capacity FPGA Family
• System Performance to 40 MHz over Military Temperature
• Low-Power 1.0µ CMOS Technology
ACT 1 Features
• Lowest-Cost FPGA Family
• System Performance to 20 MHz over Military Temperature
• Low-Power 1.0µ CMOS Technology
P r o d u c t F a m i l y P r o f i l e (more devices on page 2)
Family
3200DX
Device A32100DX
Capacity
System Gates
Logic Gates
SRAM Bits
15,000
10,000
2,048
Logic Modules
S-Modules
C-Modules
Decode
1,362
700
662
20
Flip-Flops (Maximum)
738
User I/Os (Maximum)
152
Performance
System Speed (maximum)
55 MHz
Packages (by Pin Count)
CPGA
CQFP
84
A32200DX
30,000
20,000
2,560
2,414
1,230
1,184
24
1,276
202
55 MHz
208, 256
A1425A
3,750
2,500
NA
310
160
150
NA
435
100
60 MHz
133
132
ACT 3
A1460A
A14100A
1200XL
A1280XL
9,000
6,000
NA
848
432
416
NA
976
168
15,000
10,000
NA
1,377
697
680
NA
1,493
228
12,000
8,000
1,232
624
608
NA
998
140
60 MHz
60 MHz
50 MHz
207 257 176
196 256 172
January 2000
© 2000 Actel Corporation
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1 page




A32200DX pdf
DESC SMD/Actel Part Number Cross Reference
Actel Part Number
DSCC SMD
(Gold Leads)
A1010B-PG84B
A1010B-1PG84B
A1020B-PG84B
A1020B-1PG84B
A1020B-CQ84B
A1020B-1CQ84B
A1240A-PG132B
A1240A-1PG132B
A1280A-PG176B
A1280A-1PG176B
A1280A-CQ172B
A1280A-1CQ172B
A1425A-PG133B
A1425A-1PG133B
A1425A-CQ132B
A1425A-1CQ132B
A1460A-PG207B
A1460A-1PG207B
A1460A-CQ196B
A1460A-1CQ196B
A14100A-PG257B
A14100A-1PG257B
A14100A-CQ256B
A14100A-1CQ256B
A32100DX-CQ84B
A32100DX-1CQ84B
A32200DX-CQ256B
A32200DX-1CQ256B
A32200DX-CQ208B
A32200DX-1CQ208B
(Gold Leads)
5962-9096403MXC
5962-9096404MXC
5962-9096503MUC
5962-9096504MUC
5962-9096503MTC
5962-9096504MTC
5962-9322101MXC
5962-9322102MXC
5962-9215601MXC
5962-9215602MXC
5962-9215601MYC
5962-9215602MYC
5962-9552001MXC
5962-9552002MXC
5962-9552001MYC
5962-9552002MYC
5962-9550801MXC
5962-9550802MXC
5962-9550801MYC
5962-9550802MYC
5962-9552101MXC
5962-9552102MXC
5962-9552101MYC
5962-9552102MYC
5962-9875901QXC
5962-9857902QXC
5962-9952701QXC
5962-9952702QXC
5962-9952701QYC
5962-9952702QYC
HiRel FPGAs
DSCC SMD
(Solder Dipped)
5962-9096403MXA
5962-9096404MXA
5962-9096503MUA
5962-9096504MUA
5962-9096503MTA
5962-9096504MTA
5962-9322101MXA
5962-9322102MXA
5962-9215601MXA
5962-9215602MXA
5962-9215601MYA
5962-9215602MYA
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
5

5 Page





A32200DX arduino
HiRel FPGAs
Package Thermal Characteristics
The device junction to case thermal characteristic is θjc, and
the junction to ambient air characteristic is θja. The thermal
characteristics for θja are shown with two different air flow
rates.
Maximum junction temperature is 150°C.
A sample calculation of the absolute maximum power
dissipation allowed for a CPGA 176-pin package at military
temperature is as follows:
M------a--x----.---j-u---n---c---t--i-o---n-----t-e---m-----p---.---(--°--C----)----–----M-----a---x---.---m-----i-l--i--t-a---r--y-----t-e---m-----p--. = 1---5---0---°---C-----–-----1---2---5---°--C--- = 1.1 W
θja (°C/W)
23°C/W
Package Type
Ceramic Pin Grid Array
Ceramic Quad Flat Pack
Pin Count
84
132
133
176
207
257
84
132
172
196
256
θjc
6.0
4.8
4.8
4.6
3.5
2.8
7.8
7.2
6.8
6.4
6.2
θja
Still Air
33
25
25
23
21
15
40
35
25
23
20
θja
300 ft/min
20
16
15
12
10
8
30
25
20
15
10
Units
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Power Dissipation
General Power Equation
P = [ICCstandby + ICCactive] * VCC + IOL * VOL * N +
IOH * (VCC – VOH) * M
where:
ICCstandby is the current flowing when no inputs or outputs
are changing.
ICCactive is the current flowing due to CMOS switching.
IOL, IOH are TTL sink/source currents.
VOL, VOH are TTL level output voltages.
N equals the number of outputs driving TTL loads to
VOL.
M equals the number of outputs driving TTL loads to
VOH.
Accurate values for N and M are difficult to determine
because they depend on the family type, on the design, and on
the system I/O. The power can be divided into two
components—static and active.
Static Power Component
Actel FPGAs have small static power components that result
in power dissipation lower than that of PALs or PLDs. By
integrating multiple PALs or PLDs into one FPGA, an even
greater reduction in board-level power dissipation can be
achieved.
The power due to standby current is typically a small
component of the overall power. Standby power is calculated
below for commercial, worst-case conditions.
Family
ACT 3
1200XL/3200DX
ACT 2
ACT 1
ICC
2 mA
2 mA
2 mA
3 mA
VCC
5.25V
5.25V
5.25V
5.25V
Power
10.5 mW
10.5 mW
10.5 mW
15.8 mW
The static power dissipated by TTL loads depends on the
number of outputs driving high or low and the DC load
current. Again, this value is typically small. For instance, a
32-bit bus sinking 4 mA at 0.33V will generate 42 mW with all
outputs driving low, and 140 mW with all outputs driving high.
Active Power Component
Power dissipation in CMOS devices is usually dominated by
the active (dynamic) power dissipation. This component is
frequency dependent, a function of the logic and the external
I/O. Active power dissipation results from charging internal
chip capacitances of the interconnect, unprogrammed
antifuses, module inputs, and module outputs, plus external
capacitance due to PC board traces and load device inputs.
An additional component of the active power dissipation is
the totempole current in CMOS transistor pairs. The net
effect can be associated with an equivalent capacitance that
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