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PDF HCTS190HMSR Data sheet ( Hoja de datos )
| Número de pieza | HCTS190HMSR | |
| Descripción | Radiation Hardened Synchronous 4-Bit Up/Down Counter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HCTS190MS
September 1995
Radiation Hardened
Synchronous 4-Bit Up/Down Counter
Features
Description
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA @ VOL, VOH
The Intersil HCTS190MS is an asynchronously presettable
BCD Decade synchronous counter. Presetting the counter to
the number on the preset data inputs (P0 - P3) is accom-
plished by a low on the parallel load input (PL). Counting
occurs when (PL) is high, Count Enable (CE) is low and the
Up/Down (U/D) input is either low for up-counting or high for
down-counting. The counter is incremented or decremented
synchronously with the low-to-high transition of the clock.
When an overflow or underflow of the counter occurs, the
Terminal Count output (TC), which is low during counting,
goes high and remains high for one clock cycle. This output
can be used for look-ahead carry in high speed cascading.
The TC output also initiates the Ripple Clock output (RC)
which, normally high, goes low and remains low for the low-
level portion of the clock pulse. These counter can be cas-
caded using the Ripple Carry output.
If the decade counter is preset to an illegal state or assumes
an illegal state when power is applied, it will return to the
normal sequence in one or two counts
The HCTS190MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS190MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCTS190DMSR
HCTS190KMSR
HCTS190D/Sample
HCTS190K/Sample
HCTS190HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
P1 1
Q1 2
Q0 3
CE 4
U/D 5
Q2 6
Q3 7
GND 8
16 VCC
15 P0
14 CP
13 RC
12 TC
11 PL
10 P2
9 P3
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
P1
Q1
Q0
CE
U/D
Q2
Q3
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
P0
CP
RC
TC
PL
P2
P3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518614
File Number 2474.2
1 page  
Specifications HCTS190MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Capacitance Power Dissipation
SYMBOL
CPD
(NOTE 1)
CONDITIONS
VCC = 5.0V, f = 1MHz
Input Capacitance
CIN VCC = 5.0V, f = 1MHz
Output Transition Time
Maximum Operating Frequency
(CPU, CPD)
Setup Time
Pn to PL
Setup Time
CE to CP
Setup Time
U/D to CP
Hold Time
Pn to PL
Hold Time
CE to CP
Hold Time
U/D to CP
Recovery Time
TTHL
TTLH
FMAX
VCC = 4.5V
VCC = 4.5V
TSU
VCC = 4.5V
TSU
VCC = 4.5V
TSU
VCC = 4.5V
TH VCC = 4.5V
TH VCC = 4.5V
TH VCC = 4.5V
TREC VCC = 4.5V
CP Pulse Width
TW VCC = 4.5V
PLN Pulse Width
TW VCC = 4.5V
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
LIMITS
MIN MAX
- 60
- 128
- 10
- 10
- 15
- 22
30
20
12 -
18 -
12 -
18 -
18 -
27 -
2-
2-
2-
2-
0-
0-
12 -
18 -
16 -
24 -
20
30
UNITS
pF
pF
pF
pF
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
SYMBOL
(NOTES 1, 2)
CONDITIONS
ICC VCC = 5.5V, VIN = VCC or GND
IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
TEMPERATURE
+25oC
+25oC
200K RAD
LIMITS
MIN MAX UNITS
- 0.75 mA
4.0 - mA
+25oC
-4.0 - mA
Spec Number 518614
5
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