|
|
PDF HCTS02DMSR Data sheet ( Hoja de datos )
| Número de pieza | HCTS02DMSR | |
| Descripción | Radiation Hardened Quad 2-Input NOR Gate | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HCTS02DMSR (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
HCTS02MS
August 1995
Radiation Hardened
Quad 2-Input NOR Gate
Features
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD(Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 1012 Rads (Si)/s
• Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS02MS is a Radiation Hardened Quad 2-Input
NOR Gate. A low on both inputs forces the output to a High state.
The HCTS02MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Y1
A1
B1
Y2
A2
B2
GND
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
Y1 1
A1 2
B1 3
Y2 4
A2 5
B2 6
GND 7
14 VCC
13 Y4
12 B4
11 A4
10 Y3
9 B3
8 A3
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1 14
2 13
3 12
4 11
5 10
69
78
VCC
Y4
B4
A4
Y3
B3
A3
The HCTS02MS is supplied in a 14 lead Ceramic Flatpack Pack-
age (K suffix) or a 14 lead SBDIP Package (D suffix).
TRUTH TABLE
INPUTS
OUTPUTS
Ordering Information
PART
NUMBER
TEMPERATURE SCREENING
RANGE
LEVEL
PACKAGE
HCTS02DMSR -55oC to +125oC Intersil Class 14 Lead SBDIP
S Equivalent
HCTS02KMSR -55oC to +125oC Intersil Class 14 Lead Ceramic
S Equivalent Flatpack
HCTS02D/
Sample
+25oC
Sample
14 Lead SBDIP
HCTS02K/
Sample
+25oC
Sample
14 Lead Ceramic
Flatpack
HCTS02HMSR
+25oC
Die
Die
An Bn Yn
L LH
LHL
HL L
HH L
NOTE: L = Logic Level Low, H = Logic level High
Functional Diagram
An
(2, 5, 8, 11)
Bn
(3, 6, 9, 12)
Yn
(1, 4, 10, 13)
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
Spec Number 518841
File Number 2137.2
1 page  
Specifications HCTS02MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1)
1, 4, 10, 13
2, 3, 5, 6, 7, 8, 9, 11, 12
-
14 - -
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
1, 4, 10, 13
7
-
2, 3, 5, 6, 8, 9, 11,
-
12, 14
-
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
7
1, 4, 10, 13
14
2, 3, 5, 6, 8, 9,
-
11, 12
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% static burn-in.
2. Each Pin except VCC and GND will have a resistor of 1kΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
1, 4, 10, 13
7
2, 3, 5, 6, 8, 9, 11, 12, 14
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518841
5
5 Page 
HCTS02MS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Spec Number
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HCTS02DMSR.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HCTS02DMSR | Radiation Hardened Quad 2-Input NOR Gate | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |