NCP5378 Datasheet PDF - ON Semiconductor
| Part Number | NCP5378 | |
| Description | Single Phase Synchronous Buck Controller | |
| Manufacturers | ON Semiconductor | |
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NCP5378
Single Phase Synchronous
Buck Controller with
Integrated Gate Drivers and
Programmable DAC
The NCP5378 is a single chip solution which combines differential
voltage sensing, differential phase current sensing, adaptive voltage
positioning, and on board gate drivers to provide accurately regulated
power for Intel processors. This controller IC maintains the same
features as the multi−phase product family, but reduces the output to a
single−phase, for lower current systems. Low power mode operation
combined with inductor current sensing reduces system cost by
providing the fastest initial response to dynamic load events.
The gate drive adaptive non overlap and power saving operation
circuit can provide a low switching loss and high efficiency solution
for notebook and desktop systems. A high performance operational
error amplifier is provided to simplify compensation of the system.
Dynamic Reference Injection further simplifies loop compensation by
eliminating the need to compromise between closed−loop transient
response and Dynamic VID performance.
Features
• Meets Intel’s VR11.1 Specifications
• High Performance Operational Error Amplifier
• Internal Soft Start
• Dynamic Reference Injection (Patent #US07057381)
• DAC Range from 0.5 V to 1.6 V
• ±0.5% DAC Voltage Accuracy from 1.0 V to 1.6 V
• True Differential Remote Voltage Sensing Amplifier
• “Lossless” Differential Inductor Current Sensing
• Adaptive Voltage Positioning (AVP)
• Latched Over Voltage Protection (OVP)
• Guaranteed Startup into Pre−Charged Loads
• Threshold Sensitive Enable Pin for VTT Sensing
• Power Good Output with Internal Delays
• Thermally Compensated Current Monitoring
• Thermal Shutdown Protection
• Adaptive−Non−Overlap Gate Drive Circuit
• Integrated MOSFET Drivers
• Automatic Power−saving Modes Maximize Efficiency during Light
Load Operation
• 32−lead QFN
• This is a Pb−Free Device
Applications
• Desktop Power Supplies for Next−generation Intel Chipsets
© Semiconductor Components Industries, LLC, 2009
October, 2009 − Rev. 1
1
http://onsemi.com
1 32
QFN32
CASE 488AM
MARKING DIAGRAM
1
NCP5378
AWLYYWWG
G
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
VR_RDY 1
IMON
VSP
VSN
VFB
COMP
QFN−32
(Top View)
DIFFOUT
ILIM
VCC
BST
TG
SWN
VCCP
BG
EN
OFS
ORDERING INFORMATION
Device
Package
Shipping†
NCP5378MNR2G QFN32 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NCP5378/D
|
| |
 
NCP5378
ELECTRICAL CHARACTERISTICS
0°C < TA < 70°C; 0°C < TJ < 125°C; 4.75 < VCC < 5.25 V; All DAC Codes; CVCC = 0.1 mF unless otherwise noted.
Parameter
Test Conditions
Min Typ Max Unit
ERROR AMPLIFIER
Input Bias Current
−200
−
200 nA
Open Loop DC Gain
Open Loop Unity Gain Bandwidth
Open Loop Phase Margin
Slew Rate
Maximum Output Voltage
Minimum Output Voltage
Output Source Current
Output Sink Current
DIFFERENTIAL SUMMING AMPLIFIER
CL = 60 pF to GND,
RL = 10 kW to GND
CL = 60 pF to GND,
RL = 10 kW to GND
CL = 60 pF to GND,
RL = 10 kW to GND
DVin = 100 mV, G = −10V/V,
DVout = 1.5 V − 2.5 V,
CL = 60 pF to GND,
DC Load = ±125 mA to GND
10 mV of Overdrive,
ISOURCE = 2.0 mA
10 mV of Overdrive,
ISINK = 500 mA
10 mV of Overdrive,
Vout = 3.5 V
10 mV of Overdrive,
Vout = 0.1 V
− 100 − dB
− 18 − MHz
− 70 −
°
− 10 − V/ms
3.0 − − V
− − 75 mV
1.5 2.0 − mA
0.65 1.0 − mA
V+ Input Pull down Resistance
DRVON = low
DRVON = high
− 0.6 − kW
− 6.0 −
V+ Input Bias Voltage
DRVON = low
DRVON = high
− 0.05 0.1
0.8 0.88 0.95
V
Input Voltage Range (Note 3)
−0.3 − 3.0 V
−3 dB Bandwidth
Closed Loop DC gain VS to Diffout (Note 3)
Maximum Output Voltage
Minimum Output Voltage
Output Source Current
Output Sink Current
INTERNAL OFFSET VOLTAGE
CL = 80 pF to GND,
RL = 10 kW to GND
VS+ to VS− = 0.5 V to 1.6 V
10 mV of Overdrive,
ISOURCE = 2 mA
10 mV of Overdrive,
ISINK = 1 mA
10 mV of Overdrive,
Vout = 3 V
10 mV of Overdrive,
Vout = 0.2 V
− 15 − MHz
0.98 1.0 1.02 V/V
3.0 − − V
− − 0.5 V
1.5 2.0 − mA
1.0 1.5 − mA
Offset Voltage to the (+) Pin of the Error Amp &
the VDRP Pin
−2 0 +2 mV
VDROOP AMPLIFIER
Input Bias Current
−200
−
200 nA
Inverting Voltage Range
0 1.3 3.0 V
Open Loop DC Gain
CL = 20 pF to GND including ESD
RL = 1 kW to GND
− 100 − dB
Open Loop Unity Gain Bandwidth
CL = 20 pF to GND including ESD
RL = 1 kW to GND
− 18 − MHz
3. Guaranteed by design.
4. For propagation delays, “tpdh” refers to the specified signal going high “tpdl” refers to it going low. Reference Gate Timing Diagram.
http://onsemi.com
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| Information | Total 18 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ NCP5378.PDF Datasheet ] | |
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