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PDF HCS273D Data sheet ( Hoja de datos )

Número de pieza HCS273D
Descripción Radiation Hardened Octal D Flip-Flop
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! HCS273D Hoja de datos, Descripción, Manual

HCS273MS
September 1995
Radiation Hardened
Octal D Flip-Flop
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
MR 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS273MS is a Radiation Hardened octal D flip-flop,
positive edge triggered, with reset.
The HCS273MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS273MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Ordering Information
PART NUMBER
HCS273DMSR
HCS273KMSR
HCS273D/Sample
HCS273K/Sample
HCS273HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
336
Spec Number 518767
File Number 2475.3

1 page




HCS273D pdf
Specifications HCS273MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Noise Immunity
Functional Test
CP to Q
MR to Q
SYMBOL
(NOTES 1, 2)
CONDITIONS
TEMPERATURE
ICC VCC = 5.5V, VIN = VCC or GND
+25oC
IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25oC
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25oC
VOL
VCC = 4.5V and 5.5V, VIH =VCC, VIL = 0V,
IOL = 50µA
+25oC
VOH
VCC = 4.5V and 5.5V, VIH = VCC, VIL = 0V,
IOH = -50µA
+25oC
IIN VCC = 5.5V, VIN = VCC or GND
+25oC
FN VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC)
(Note 3)
+25oC
TPLH VCC = 4.5V
+25oC
TPHL VCC = 4.5V
+25oC
TPHL VCC = 4.5V
+25oC
200K RAD
LIMITS
MIN MAX UNITS
- 0.75 mA
6.0 - mA
-6.0 - mA
- 0.1 V
VCC
-0.1
-
-
-
±5
-
V
µA
-
2 22 ns
2 27 ns
2 29 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
Spec Number 518767
340

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