PDF HCPL4504 Data sheet ( Hoja de datos )

Número de pieza	HCPL4504
Descripción	High CMR/ High Speed Optocouplers
Fabricantes	Agilent(Hewlett-Packard)
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H High CMR, High Speed Optocouplers Technical Data HCPL-4504 HCPL-0454 HCNW4504 Features • Short Propagation Delays for TTL and IPM Applications • 15 kV/µs Minimum Common Mode Transient Immunity at VCM = 1500 V for TTL/Load Drive • High CTR at TA = 25°C >25% for HCPL-4504/0454 >23% for HCNW4504 • Electrical Specifications for Common IPM Applications • TTL Compatible • Guaranteed Performance from 0°C to 70°C • Open Collector Output • Safety Approval UL Recognized - 2500 V rms for 1 minute (5000 V rms for 1 minute for HCPL-4504#020 and HCNW4504)per UL1577 CSA Approved VDE 0884 Approved -VIORM = 630 V peak for HCPL-4504#060 -VIORM = 1414 V peak for HCNW4504 BSI Certified (HCNW4504) • Available in 8-Pin DIP, SO-8, Widebody Packages Applications • Inverter Circuits and Intelligent Power Module (IPM) interfacing - High Common Mode Transient Immunity (> 10 kV/µs for an IPM load/drive) and (tPLH - tPHL) Specified (See Power Inverter Dead Time section) • Line Receivers - Short Propagation Delays and Low Input-Output Capacitance • High Speed Logic Ground Isolation - TTL/TTL, TTL/ CMOS, TTL/LSTTL • Replaces Pulse Transformers - Save Board Space and Weight • Analog Signal Ground Isolation - Integrated Photodetector Provides Improved Linearity over Phototransistors Functional Diagram NC 1 ANODE 2 CATHODE 3 NC 4 8 VCC 7 NC 6 VO 5 GND Description These optocouplers are similar to HP’s other high speed transistor optocouplers but with shorter propagation delays and higher CTR. The HCPL-4504/0454 and HCNW4504 also have a guaran- teed propagation delay difference (tPLH - tPHL). These features make these optocouplers an excellent solution to IPM inverter dead time and other switching problems. TRUTH TABLE LED ON OFF VO LOW HIGH A 0.1 µF bypass capacitor between pins 5 and 8 is recommended. CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. 5965-3604E 1-33 1 page 8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW4504) 11.15 ± 0.15 (0.442 ± 0.006) PAD LOCATION (FOR REFERENCE ONLY) 87 6 5 9.00 ± 0.15 (0.354 ± 0.006) 1234 (06.2.1452)TYP. 12.30 ± 0.30 (0.484 ± 0.012) 1.55 (0.061) MAX. (04..10508)MAX. 1.3 (0.051) 0.9 (0.035) 12.30 ± 0.30 (0.484 ± 0.012) 11.00 MAX. (0.433) 1.78 ± 0.15 (0.070 ± 0.006) 2.54 (0.100) BSC 0.75 ± 0.25 (0.030 ± 0.010) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES). 1.00 ± 0.15 (0.039 ± 0.006) 0.254 + 0.076 - 0.0051 (0.010+- 0.003) 0.002) 7° NOM. Solder Reflow Temperature Profile (HCPL-0454 and Gull Wing Surface Mount Option Parts) 260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 ∆T = 115°C, 0.3°C/SEC ∆T = 100°C, 1.5°C/SEC 1 23 4 5 6 7 8 TIME – MINUTES ∆T = 145°C, 1°C/SEC 9 10 11 12 Note: Use of nonchlorine activated fluxes is highly recommended. 1-37 5 Page Package Characteristics Over recommended temperature (TA = 0°C to 25°C) unless otherwise specified. Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Input-Output Momentary Withstand Voltage† VISO HCPL-4504 2500 HCPL-0454 HCNW4504 5000 HCPL-4504 5000 (Option 020) V rms RH ≤ 50%, t = 1 min., TA = 25°C Input-Output Resistance RI-O HCPL-4504 HCPL-0454 1012 Ω VI-O = 500 Vdc Input-Output Capacitance HCNW4504 1012 1013 1011 CI-O HCPL-4504 HCPL-0454 0.6 TA = 25°C TA = 100°C pF f = 1 MHz HCNW4504 0.5 0.6 Fig. Note 6, 13 6, 14 6, 11, 14 6 6 *All typicals at TA = 25°C.. †The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if applicable), your equipment level safety specification or HP Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.” Notes: 1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C (8-Pin DIP). Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C (SO-8). 2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C (8-Pin DIP). Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C (SO-8). 3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C (8-Pin DIP). Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C (SO-8). 4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C (8-Pin DIP). Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C (SO-8). 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together. 7. Under TTL load and drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 8. Under IPM (Intelligent Power Module) load and LED drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0 V). 9. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor. 10. The RL = 20 kΩ, CL = 100 pF load represents an IPM (Intelligent Power Module) load. 11. See Option 020 data sheet for more information. 12. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 is recommended. 13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (leakage detection current limit, Ii-o ≤ 5 µA). This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable. 14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage detection current limit, Ii-o ≤ 5 µA). This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable. 15. The difference between tPLH and tPHL between any two devices (same part number) under the same test condition. (See Power Inverter Dead Time and Propagation Delay Specifications section.) 1-43 11 Page

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