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PDF HCPL4503M Data sheet ( Hoja de datos )
| Número de pieza | HCPL4503M | |
| Descripción | HIGH SPEED TRANSISTOR OPTOCOUPLERS | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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HCPL4503M
PACKAGE
HIGH SPEED
TRANSISTOR OPTOCOUPLERS
SCHEMATIC
8
1
8
1
8
1
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7 N/C
6V
O
5 GND
DESCRIPTION
The HCPL4503M optocoupler consists of an AlGaAs LED optically coupled to a high speed photodetector transistor.
A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional
phototransistor optocouplers by reducing the base-collector capacitance of the input transistor. The base of the phototransistor is
not bonded out to a pin for improved noise immunity.
An internal noise shield provides superior common mode rejection of 15kV/µs minimum.
FEATURES
• VISO = 5kV RMS is standard for all devices
• High speed-1 MBit/s
• Superior CMR, CMH = 50 kV/ms (typical); CML = 30 kV/ms (typical)
• No base connection for improved noise immunity
• CTR guaranteed 0-70°C
• U.L. recognized (File # E90700, Vol 2)
• VDE approval pending
APPLICATIONS
• Line receivers
• Pulse transformer replacement
• Output interface to CMOS-LSTTL-TTL
• Wide bandwidth analog coupling
© 2004 Fairchild Semiconductor Corporation
Page 1 of 12
4/29/04
1 page  
HIGH SPEED
TRANSISTOR OPTOCOUPLERS
HCPL4503M
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Input-output
insulation leakage current
Withstand insulation test voltage
Resistance (input to output)
Capacitance (input to output)
Test Conditions
Symbol
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 4)
(RH ≤ 50%, TA = 25°C)
(Note 4) ( t = 1 min.)
(Note 9) (VI-O = 500 VDC)
(Note 4) (f = 1 MHz)
II-O
VISO
RI-O
CI-O
Min
5,000
Typ**
1012
0.6
Max
1.0
Unit
µA
VRMS
Ω
pF
Notes
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted
together.
© 2004 Fairchild Semiconductor Corporation
Page 5 of 12
4/29/04
5 Page 
HIGH SPEED
TRANSISTOR OPTOCOUPLERS
HCPL4503M
Reflow Profile
300 245C, 10–30 s
250 260C peak
200
150
100 Time above 183C, <160 sec
50 Ramp up = 2–10C/sec
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Time (Minute)
• Peak reflow temperature: 260 C (package surface temperature)
• Time of temperature higher than 183 C for 160 seconds or less
• One time soldering reflow is recommended
© 2004 Fairchild Semiconductor Corporation
Page 11 of 12
4/29/04
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HCPL4503M.PDF ] | |
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