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Zarlink - Quad Low Voltage Subscriber Line Audio-Processing Circuit

Numéro de référence Le58QL021BVC
Description Quad Low Voltage Subscriber Line Audio-Processing Circuit
Fabricant Zarlink 
Logo Zarlink 





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Le58QL021BVC fiche technique
Le58QL02/021/031
Quad Low Voltage Subscriber Line Audio-Processing Circuit
VE580 Series
APPLICATIONS
„ Codec function on telephone switch line cards
FEATURES
„ Low-power, 3.3 V CMOS technology with 5-V tolerant
digital inputs
„ Software and coefficient compatible to the Le79Q02/
021/031 QSLAC™ device
„ Performs the functions of four codec/filters
„ Software programmable:
— SLIC device input impedance
— Transhybrid balance
— Transmit and receive gains
— Equalization (frequency response)
— Digital I/O pins
— Programmable debouncing on one input
— Time slot assigner
— Programmable clock slot and PCM transmit clock edge
options
„ Standard microprocessor interface
„ A-law, µ-law, or linear coding
„ Single or Dual PCM ports available
— Up to 128 channels (PCLK at 8.192 MHz) per PCM port
— Optional supervision on the PCM highway
„ 1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or
8.192 MHz master clock derived from MCLK or PCLK
„ Built-in test modes with loopback, tone generation,
and µP access to PCM data
„ Mixed state (analog and digital) impedance scaling
„ Performance guaranteed over a 12 dB gain range
„ Real Time Data register with interrupt (open drain or
TTL output)
„ Supports multiplexed SLIC device outputs
„ Broadcast state
„ 256 kHz or 293 kHz chopper clock for Legerity SLIC
devices with switching regulator
„ Maximum channel bandwidth for V.90 modems
RELATED LITERATURE
„ 080754 Le58QL061/063 QLSLAC™ Device Data Sheet
„ 080761 QSLAC™ to QLSLAC™ Device Design
Conversion Guide
„ 080758 QSLAC™ to QLSLAC™ Guide to New Designs
ORDERING INFORMATION
Device
Package (Green)1
Packing2
Le58QL02FJC
44-pin PLCC
Tube
Le58QL021FJC
44-pin PLCC
Tube
Le58QL021BVC
44-pin TQFP
Tray
Le58QL031DJC
32-pin PLCC
Tube
1. The green package meets RoHS Directive 2002/95/EC of the
European Council to minimize the environmental impact of
electrical equipment.
2. For delivery using a tape and reel packing system, add a "T" suffix
to the OPN (Ordering Part Number) when placing an order.
DESCRIPTION
The Le58QL02/021/031 Quad Low Voltage Subscriber Line
Audio-Processing Circuit (QLSLAC™) devices integrate the
key functions of analog line cards into high-performance, very-
programmable, four-channel codec-filter devices. The
QLSLAC devices are based on the proven design of Legerity’s
reliable SLAC™ device families. The advanced architecture of
the QLSLAC devices implements four independent channels
and employs digital filters to allow software control of
transmission, thus providing a cost-effective solution for the
audio-processing function of programmable line cards. The
QLSLAC devices are software and coefficient compatible to the
QSLAC devices.
Advanced submicron CMOS technology makes the Le58QL02/
021/031 QLSLAC devices economical, with both the
functionality and the low power consumption needed in line
card designs to maximize line card density at minimum cost.
When used with four Legerity SLIC devices, a QLSLAC device
provides a complete software-configurable solution to the
BORSCHT functions.
BLOCK DIAGRAM
Analog
VIN1
VOUT 1
VIN2
VOUT 2
VIN3
VOUT 3
VIN4
VOUT 4
VREF
SLIC
CD11
CD21
C31
C41
C51
CD12
CD22
C32
C42
C52
CD13
CD23
C33
C43
C53
CD14
CD24
C34
C44
C54
CHCLK
Signal Processing
Channel 1 (CH 1)
Signal Processing
Channel 2 (CH 2)
Signal Processing
Channel 3 (CH 3)
Signal Processing
Channel 4 (CH 4)
Clock
&
Reference
Circuits
Time Slot Assigner
(TSA)
SLIC
Interface
(SLI)
Microprocessor Interface
(MPI)
INT CS DIO DCLK
Microprocessor
Dual/Single
PCM
Highway
DXA
DRA
TSCA
DXB
DRB
TSCB
FS
PCLK
MCLK/E1
RST
Document ID# 080753 Date: April 09, 2009
Version:
9
Distribution: Public Document

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