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PDF HMS30C7210 Data sheet ( Hoja de datos )

Número de pieza HMS30C7210
Descripción ARM Based 32-Bit Microprocessor
Fabricantes ABOV　
Logotipo ABOV Logotipo



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HMS30C7210
ARM Based 32-Bit Microprocessor
DATASHEET
(7210 DS-15)
Copyright. 2007 ABOV Semiconductor Co.,Ltd.
ALL RIGHTS RESERVED. No part of this publication may be copied in any form, by photocopy, microfilm, retrieval system, or by any other means
now known or hereafter invented without the prior written permission of ABOV Semiconductor Co.,Ltd.
ABOV Semiconductor Co.,Ltd.
7th Floor, 1007-3, Daechi-dong, Gangnam-gu, Seoul, Republic of Korea
Homepage: www.abov.co.kr
Technical Support Homepage: www.softonchip.com

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HMS30C7210 pdf
Contents
LIST OF CONTENTS
1 ARCHITECTURAL OVERVIEW ............................................................................ - 9 -
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.5
1.6
1.7
1.7.1
1.7.2
1.8
PROCESSOR ..................................................................................................................- 9 -
VIDEO ..........................................................................................................................- 9 -
MEMORY......................................................................................................................- 9 -
INTERNAL BUS STRUCTURE .......................................................................................... - 9 -
ASB ......................................................................................................................... - 9 -
Video bus................................................................................................................. - 9 -
APB ........................................................................................................................- 10 -
SDRAM CONTROLLER............................................................................................... - 10 -
PERIPHERALS ............................................................................................................. - 10 -
POWER MANAGEMENT ................................................................................................ - 11 -
Clock gating ...........................................................................................................- 11 -
PMU.......................................................................................................................- 11 -
TEST AND DEBUG........................................................................................................ - 12 -
2 SIGNAL DESCRIPTION ..........................................................................................- 13 -
2.1
2.2
2.3
2.3.1
2.3.2
2.4
2.4.1
2.4.2
208-PIN DIAGRAM...................................................................................................... - 13 -
RESET VALUE ........................................................................................................... - 14 -
208 PIN / BALL NAME................................................................................................. - 15 -
LQFP Type Dimensions..........................................................................................- 16 -
CABGA Type Dimensions.......................................................................................- 17 -
PIN DESCRIPTIONS...................................................................................................... - 19 -
External Signal Functions......................................................................................- 19 -
Pin Specific Description.........................................................................................- 22 -
3 ARM720T MACROCELL ........................................................................................- 27 -
3.1 ARM720T MACROCELL............................................................................................. - 27 -
4 MEMORY MAP.........................................................................................................- 29 -
5 INTERNAL BOOT ROM..........................................................................................- 35 -
5.1 HARDWARE SETTING .................................................................................................. - 35 -
5.2 SOFTWARE SETTING.................................................................................................... - 36 -
6 PMU & PLL ...............................................................................................................- 37 -
6.1
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.3
6.4
6.4.1
6.4.2
6.4.3
6.5
6.5.1
6.5.2
6.5.3
EXTERNAL SIGNALS ................................................................................................... - 38 -
REGISTERS ................................................................................................................. - 38 -
PMU Mode Register (PMUMR).............................................................................- 39 -
PMU ID Register (PMUID) ...................................................................................- 39 -
PMU Reset/Status Register (PMURSR) .................................................................- 40 -
PMU Clock Control Register (PMUCCR) .............................................................- 43 -
PMU Debounce Counter Test Register (PMUDCTR) ............................................- 45 -
PMU Test Register (PMUTR).................................................................................- 47 -
PMU FUNCTIONS ....................................................................................................... - 48 -
POWER MANAGEMENT ............................................................................................... - 51 -
State Diagram ........................................................................................................- 51 -
Power management States......................................................................................- 52 -
Wake-up Debounce and Interrupt ..........................................................................- 53 -
RESET SEQUENCES ..................................................................................................... - 54 -
Power On Reset (Cold Reset)) ...............................................................................- 54 -
Software Generated Warm Reset ............................................................................- 56 -
An Externally Generated Warm Rese .....................................................................- 57 -
i ABOV Semiconductor Co.,Ltd.
HMS30C7210 DataSheet (DS-15)

5 Page





HMS30C7210 arduino
Contents
LIST OF TABLES
Table 2-1 Pin Signal Type Definition.............................................................................................. - 19 -
Table 2-2 External Signal Functions .............................................................................................. - 21 -
Table 4-1 Top-level address map................................................................................................... - 29 -
Table 4-2 Peripherals Base Addresses.......................................................................................... - 33 -
Table 5-1. Pin Configuration .......................................................................................................... - 35 -
Table 5-2. NAND / MMC Map ........................................................................................................ - 36 -
Table 6-1. PMU Register Summary ............................................................................................... - 38 -
Table 6-2. Bit Settings for a Cold RESET Event within PMURSR register .................................... - 54 -
Table 6-3. Bit Settings for a Software generated Warm Reset within Reset / Status register ........ - 56 -
Table 6-4. Bit Settings for a Warm Reset within Reset / Status register ........................................ - 57 -
Table 7-1 SDRAM Controller Register Summary .......................................................................... - 61 -
Table 7-2 SDRAM Row/Column Address Map .............................................................................. - 66 -
Table 7-3 SDRAM Device Selection .............................................................................................. - 66 -
Table 8-1 Static Memory Controller Register Summary................................................................. - 74 -
Table 8-2. Timing values for read access in normal mode data transfer........................................ - 80 -
Table 8-3. Timing values for read access in burst mode data transfer........................................... - 81 -
Table 8-4. Timing values for write access...................................................................................... - 82 -
Table 9-1. LCD Controller Register Summary ............................................................................... - 88 -
Table 9-2. LCD Color/Grayscale Intensities and Modulation Rates............................................... - 97 -
Table 9-3. Interrupt Controller Register Summary ........................................................................- 110 -
Table 9-4 USB Slave interface Register Summary.......................................................................- 117 -
Table 9-5. USB Supported PID Types ......................................................................................... - 125 -
Table 9-6 USB Supported Setup Requests ................................................................................. - 126 -
Table 9-7. ADC Controller Register Summary ............................................................................. - 130 -
Table 9-8 UART/SIR Register Summary ..................................................................................... - 149 -
Table 9-9 Baud Rate with Decimal Divisor at 3.92308MHz Clock Input ...................................... - 155 -
Table 9-10 Smart Card Interface Register Summary................................................................... - 165 -
Table 9-11 Baud Rate with Decimal Divisor at 3.55556MHz Clock Input..................................... - 171 -
Table 9-12 SmartMedia Controller Register Summary ................................................................ - 198 -
Table 9-13. Timer Register Summary .......................................................................................... - 212 -
Table 9-14. Watchdog Timer Register Summary ......................................................................... - 238 -
Table 9-15 Non-AMBA Signals within RTC Core Block ............................................................... - 246 -
Table 9-16. 2-Wire SBI’s Register Summary ............................................................................... - 262 -
Table 9-17. Matrix Keyboard Interface Controller Register Summary.......................................... - 278 -
Table 9-18. Scan rate calculation from CLKSEL ......................................................................... - 286 -
Table 9-19. Estimated tINTR according to CLKSEL....................................................................... - 288 -
Table 9-20. Possible configuration of KSCANO pins when keyboard matrix is connected.......... - 289 -
Table 9-21. Possible configuration of KSCANI pins when keyboard matrix is connected............ - 290 -
Table 9-22. Interrupt sources of I/Os (to interrupt controller unit) ................................................ - 314 -
Table 9-23. Propagation delays (ns) for sample pad loads.......................................................... - 316 -
Table 11-1. Maximum Ratings ............................................................................................................... i
Table 11-2. Operating Range ................................................................................................................ i
Table 11-3. CMOS signal pin characteristics ........................................................................................ ii
Table 11-4. TTL signal pin characteristics............................................................................................. ii
Table 11-5. A/D converter characteristics ............................................................................................ iii
vii ABOV Semiconductor Co.,Ltd.
HMS30C7210 DataSheet (DS-15)

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