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Número de pieza | HD74LV374A | |
Descripción | Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74LV374A (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! HD74LV374A
Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs
ADE-205-275 (Z)
1st Edition
April 1999
Description
The HD74LV374A has eight edge trigger D type flip flops with three state outputs in a 20 pin package.
Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going
transitions of the clock input. When the clock input goes low, data at the D inputs will be retained at the
outputs until clock input returns high again. When a high logic level is applied to the output control input,
all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the
state of the storage elements. Low-voltage and high-speed operation is suitable for the battery-powered
products (e.g., notebook computers), and the low-power consumption extends the battery life.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Function Table
Inputs
OE
CLK
D
Output Q
HXXZ
L↑LL
L ↑ HH
L ↓ X Q0
Note: H: High level
L: Low level
X: Immaterial
Z: High impedance
Q0: Output level before the indicated steady state input conditions were established.
1 page HD74LV374A
DC Electrical Characteristics
• Ta = –40 to 85°C
Item
Symbol
Input voltage
VIH
VIL
Output voltage VOH
VCC (V)*
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to
Max
Min
1.5
VCC × 0.7
VCC × 0.7
VCC × 0.7
—
—
—
—
VCC – 0.1
Typ
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
0.5
VCC × 0.3
VCC × 0.3
VCC × 0.3
—
Unit Test Conditions
V
V IOH = –50 µA
2.3 2.0
—
3.0 2.48 —
4.5 3.8
—
VOL
Min to
—
Max
—
—
—
—
0.1
IOH = –2 mA
IOH = –8 mA
IOH = –16 mA
IOL = 50 µA
Input current
Off-state
output current
IIN
IOZ
2.3
3.0
4.5
0 to 5.5
5.5
—
—
—
—
—
— 0.4
IOL = 2 mA
— 0.44
IOL = 8 mA
— 0.55
IOL = 16 mA
— ±1
µA VIN = 5.5 V or GND
— ±5
µA VO = VCC or GND
Quiescent
supply current
ICC
5.5 —
— 20
µA VIN = VCC or GND, IO = 0
Output leakage IOFF
0
—
—5
current
µA VI or VO = 0 to 5.5 V
Input
CIN 3.3 —
capacitance
2.9 —
pF VI = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
5
5 Page HD74LV374A
• Waveform – 1
Input CLK
Input D
Output Q
• Waveform – 2
Input CLK
tr tf
50 %VCC
10 %
tr
90 % 90 %
10 %
tf
90 %
90 %
10 %
tPLH
10 %
50 %VCC
tr tf
10 %
tsu
90 % 90 %
50 % 50 %
VCC
VCC
tw
th
10 %
tw
50 %VCC
tPHL
50 %VCC
50 %VCC
Input D
50 %VCC
50 %VCC
• Waveform – 3
tf
Input OE
90 %
50 %VCC
10 %
Waveform – A
Waveform – B
tr
90 %
50 %VCC
10 %
tZL tLZ
50 %VCC
tZH
tHZ
50 %VCC
VOL + 0.3 V
VOH – 0.3 V
VCC
GND
VCC
GND
VOH
VOL
VCC
GND
VCC
GND
VCC
GND
VCC
VOL
VOH
GND
Notes: 1. tr ≤ 3 ns, tf ≤ 3 ns
2. Input waveform: PRR ≤ 1 MHZ, duty cycle 50%
3. Waveform-A is for an output with internal conditions such that the output is low except
when disabled by the output control.
4. Waveform-B is for an output with internal conditions such that the output is high except
when disabled by the output control.
11
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet HD74LV374A.PDF ] |
Número de pieza | Descripción | Fabricantes |
HD74LV374A | Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs | Hitachi Semiconductor |
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