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PDF NCP1377B Data sheet ( Hoja de datos )
| Número de pieza | NCP1377B | |
| Descripción | PWM Current-Mode Controller for Free-Running Quasi-Resonant Operation | |
| Fabricantes | ON Semiconductor | |
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NCP1377, NCP1377B
PWM Current-Mode
Controller for Free-Running
Quasi-Resonant Operation
The NCP1377 combines a true current mode modulator and a
demagnetization detector which ensures full borderline/critical
Conduction Mode in any load/line conditions together with
minimum drain voltage switching (Quasi−Resonant operation). Due
to its inherent skip cycle capability, the controller enters burst mode
as soon as the power demand falls below a predetermined level. As
this happens at low peak current, no audible noise can be heard. For
NCP1377, an internal 8.0 ms timer prevents the free−run frequency to
exceed 100 kHz (therefore below the 150 kHz CISPR−22 EMI
starting limit), while the skip adjustment capability lets the user
select the frequency at which the burst foldback takes place. For
NC1377B, the internal timer duration is reduced to 3.0 ms to allow
operation at higher frequencies (up to 300 kHz).
The transformer core reset detection is done through an auxiliary
winding which, brought via a dedicated pin, also enables fast
Over Voltage Protection (OVP). Once an OVP has been detected, the
IC permanently latches off. The 1377 features a sampling time of
4.5 ms whereas it is 1.5 ms for the B version.
The NCP1377 also features an efficient protective circuitries
which, in presence of an overcurrent condition, disables the output
pulses and enters a safe burst mode, trying to restart. Once the default
has gone, the device auto−recovers. Finally an internal 1.0 ms
Soft−Start eliminates the traditional startup stress.
Features
• Free−Running Borderline/Critical Mode Quasi−Resonant Operation
• Latched Overvoltage Protection
• Auto−Recovery Short−Circuit Protection Via UVLO Crossover
• External Latch Triggering, e.g. Via Overtemperature Signal
• Current−Mode with Adjustable Skip Cycle Capability
• Internal 1.0 ms Soft−Start
• Internal Temperature Shutdown
• Internal Leading Edge Blanking
• 500 mA Peak Current Source/Sink Capability
• Under Voltage Lockout Level of 12.5 V (On) and 7.5 V (Min)
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Internal Minimum TOFF
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• AC−DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.)
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
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8
1
SOIC−8
DR SUFFIX
CASE 751
MARKING DIAGRAMS
8
1377
ALYW
G
1
8
1377B
ALYW
G
1
8
1
SOIC−7
D1 SUFFIX
CASE 751U
8
377D1
ALYW G
G
1
8
1
PDIP−7
P SUFFIX
CASE 626B
1
1377P
AWL
YYWWG
1
1377BP
AWL
YYWWG
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Dmg 1
FB 2
CS 3
GND 4
8 HV
6 VCC
5 Drv
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
January, 2011 − Rev. 11
1
Publication Order Number:
NCP1377/D
1 page  
NCP1377, NCP1377B
TYPICAL CHARACTERISTICS
14.0
13.5
13.0
12.5
12.0
11.5
11.0
−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 3. VCCON Threshold versus Temperature
7.90
7.80
7.70
7.60
7.50
7.40
7.30
7.20
−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 4. VCCOFF Threshold versus Temperature
1.60 2.30
1.40 2.10
1.20 1.90
1.00 1.70
0.80 1.50
0.60 1.30
0.40
−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 5. Current Consumption (No Load)
versus Temperature
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 7. HV Current Source at VCC = 10 V
versus temperature
1.10−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 6. Current Consumption (1.0 nF Load)
versus Temperature
1.10
1.05
1.00
0.95
0.90
−50 −30 −10 10 30 50 70 90 110 130
TEMPERATURE (°C)
Figure 8. Maximum Current Setpoint versus
Temperature
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5
5 Page 
NCP1377, NCP1377B
Thermistor
Rdem
18
27
36
Aux.
Winding
ON/OFF
45
CVCC
NCP1377
18
27
36
45
Aux.
VCCcap
Figure 25. A simple arrangement triggers
the latchoff as soon as the temperature
exceeds a given setpoint.
Shutting Off the NCP1377
Shutdown can easily be implemented through a simple
NPN bipolar transistor as depicted by Figure 27. When
OFF, Q1 is transparent to the operation. When forward
biased, the transistor pulls the FB pin to ground (Vcesat ≈
200 mV) and permanently disables the IC. A small time
constant on the transistor base will avoid false triggering
(Figure 27).
ON/OFF
10 k
3
2
10 nF
NCP1377
1
12
3
Q1
4
8
7
6
5
Figure 27. A Simple Bipolar Transistor Totally
Disables the IC
Overload Operation
In applications where the output current is purposely not
controlled (e.g. wall adapters delivering raw DC level), it
is interesting to implement a true short−circuit protection.
A short−circuit actually forces the output voltage to be at
Figure 26. A simple transistor arrangement
triggers the latchoff as soon as the
temperature exceeds a given setpoint.
a low level, preventing a bias current to circulate in the
optocoupler LED. As a result, the auxiliary voltage also
decreases because it also operates in Flyback and thus
duplicates the output voltage, providing the leakage
inductance between windings is kept low. To account for
this situation and properly protect the power supply,
NCP1377 hosts a dedicated overload detection circuitry.
Once activated, this circuitry imposes to deliver pulses in
a burst manner with a low Duty Cycle. The system
auto−recovers when the fault condition disappears.
During the startup phase, the peak current is pushed to
the maximum until the output voltage reaches its target and
the feedback loop takes over. The auxiliary voltage takes
place after a few switching cycles and self−supplies the IC.
In presence of a short circuit on the output, the auxiliary
voltage will go down until it crosses the undervoltage
lockout level of typically 7.5 V. When this happens,
NCP1377 immediately stops the switching pulses and
unbiases all unnecessary logical blocks. The overall
consumption drops, while keeping the gate grounded, and
the Vcc slowly falls down. As soon as Vcc reaches typically
5.6 V, the startup source turns−on again and a new startup
sequence occurs, bringing Vcc toward 12.5 V as an attempt
to restart. If the default has gone, then the power supply
normally restarts. If not, a new protective burst is initiated,
shielding the SMPS from any runaway. Figure 28 portrays
the typical operating signals in short circuit.
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| PDF Descargar | [ Datasheet NCP1377B.PDF ] | |
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