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PDF HD74HCT244 Data sheet ( Hoja de datos )
| Número de pieza | HD74HCT244 | |
| Descripción | Octal Buffers/Line Drivers/Line Receivers(noninverted 3-state outputs) | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HCT244
Octal Buffers/Line Drivers/Line Receivers
(noninverted 3-state outputs)
Description
The HD74HCT244 is a non-inverting buffer and has two active low enable (1G and 2G). Each enable
independently controls 4 buffers.
This device does not have schmitt trigger inputs.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: tpd (A to Y) = 10 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
GA
HX
LH
LL
H : High level
L : Low level
X : Irrelevant
Z : Off (high-impedance) state of a 3-state output
Output
Y
Z
H
L
1 page  
24.50
25.40 Max
20
11
1
0.89
1.30
1.27 Max
10
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
–
0.11
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-20N
—
Conforms
1.26 g
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HD74HCT244.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HD74HCT240 | Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs) | Hitachi Semiconductor |
| HD74HCT241 | Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs) | Hitachi Semiconductor |
| HD74HCT242 | Quad. Bus Transceivers (with 3-state outputs) | Hitachi Semiconductor |
| HD74HCT243 | Quad. Bus Transceivers (with 3-state outputs) | Hitachi Semiconductor |
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