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PDF HD74HC573 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC573 | |
| Descripción | Octal Transparent Latches (with 3-state outputs) | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HC563/HD74HC573
Octal Transparent Latches (with 3-state outputs)
Description
When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D
inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at
the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is
applied to the output control input, all outputs go to a high impedance state, regardless of what signals are
present at the other inputs and the state of the storage elements.
Features
• High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Outputs
Output Control Latch Enable
Data
HD74HC563
HD74HD573
L H HL H
L H LHL
LL
HX
X Q0 Q0
XZ
Z
Q0 : level of Q before the indicated Steady-sate input conditions were established.
Q0 : complement of Q0 or level of Q before the indicated Steady-state input conditions were established.
1 page  
HD74HC573
1D
2D
3D
4D
5D
6D
7D
8D
LE
OC
HD74HC563/HD74HC573
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
5
5 Page 
6.50
6.80 Max
20 11
1 10
0.65
*0.22+–00..0078
0.20 ± 0.06
0.13 M
0.65 Max
0.10
*Dimension including the plating thickness
Base material dimension
Unit: mm
6.40 ± 0.20
1.0
0° – 8° 0.50 ± 0.10
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
TTP-20DA
—
—
0.07 g
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HD74HC573.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
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