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HD74HC4024 fiches techniques PDF

Hitachi Semiconductor - 7-stage Binary Counter

Numéro de référence HD74HC4024
Description 7-stage Binary Counter
Fabricant Hitachi Semiconductor 
Logo Hitachi Semiconductor 





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HD74HC4024 fiche technique
HD74HC4024
7-stage Binary Counter
Description
The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition)
of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.
Features
High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Clock
L
L
H
H
Reset
L
H
L
H
L
H
L
H
Outputs State
No change
All outputs are low
No change
All outputs are low
No change
All outputs are low
Advance to next state
All outputs are low

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