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PDF SC1102A Data sheet ( Hoja de datos )

Número de pieza SC1102A
Descripción Synchronous Voltage Mode Controller
Fabricantes Semtech Corporation 
Logotipo Semtech Corporation Logotipo



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SC1102/SC1102A
Synchronous Voltage Mode Controller
for Distributed Power Supply Applications
POWER MANAGEMENT
Description
Features
The SC1102 and SC1102A are low-cost, full featured,
synchronous voltage-mode controllers designed for use
in single ended power supply applications where efficiency
is of primary concern. Synchronous operation allows for
the elimination of heat sinks in many applications. The
SC1102s are ideal for implementing DC/DC converters
needed to power advanced microprocessors in low cost
systems, or in distributed power applications where effi-
ciency is important. Internal level-shift, high-side drive
circuitry, and preset shoot-thru control, allows the use of
inexpensive N-channel power switches.
SC1102s features include temperature compensated
voltage reference, triangle wave oscillator and current
sense comparator circuitry. Power good signaling, shut-
down, and over voltage protection are also provided.
The SC1102 operates at a fixed frequency of 200kHz
and the SC1102A at 500kHz, providing a choice for op-
timum compromise between efficiency, external compo-
nent size, and cost.
‹ 1.265V reference available
‹ Synchronous operation for high efficiency (95%)
‹ RDS(ON) current sensing
‹ On-chip power good and OVP functions
‹ Small size with minimum external components
‹ Soft Start
‹ Enable function
‹ 14 Pin SOIC lead free package available. Fully
WEEE and RoHS compliant
Applications
‹ Microprocessor core supply
‹ Low cost synchronous applications
‹ Voltage Regulator Modules (VRM)
‹ DDR termination supplies
‹ Networking power supplies
‹ Sequenced power supplies
Two SC1102s can be used together to sequence power
up of telecom systems. The power good of the first
SC1102 connected to the enable of the second SC1102
makes this possible.
Typical Application Circuit
Typical Distributed Power Supply
+5V
R1 R2
1k
PWRGD
OVP
0.1
C1
opt. C2
0.1
R4
10 U1
SC1102
1 VCC
GND
14
2 PWRGD
SS/SHDN 13
R3
1k
3 OVP
VREF 12
4 OCSET
SENSE 11
5 PHASE
D1
MBR0520 6 DRVH
BSTH 10
BSTL 9
7 PGND
DRVL 8
C3
0.1
SHDN
VREF
+12V
C4
1.0
R5
3.9
R6
2.2
+
C5 C6 C7 C8 Vin 5V
10.0 680/6.3V 680/6.3V 680/6.3V
_
Q1
STP40NE
Q2
STP40NE
L2u1H
R1284*
R7
127
C9
180/4V
C10
180/4V
C11
180/4V
C12
180/4V
+
C13
180/4V
Vout=2.5V*
_
Figure 1.
NOTE:
*) Vout = 1.265 x (1+R8/R7)
Revision: January 5, 2006
1
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1 page




SC1102A pdf
POWER MANAGEMENT
Block Diagram
SC1102/SC1102A
Applications Information - Theory of Operation
Synchronous Buck Converter
Primary VCORE power is provided by a synchronous, volt-
age-mode pulse width modulated (PWM) controller. This
section has all the features required to build a high effi-
ciency synchronous buck converter, including “Power
Good” flag, shut-down, and cycle-by-cycle current limit.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
external resistive divider reference voltage is derived from
an internal trimmed-bandgap voltage reference (See Fig.
1). The inverting input of the error amplifier receives its
voltage from the SENSE pin.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 200kHz/500kHz. The triangular output of
the oscillator sets the reference voltage at the inverting
input of the comparator. The non-inverting input of the
comparator receives it’s input voltage from the error am-
plifier. When the oscillator output voltage drops below
the error amplifier output voltage, the comparator out-
put goes high. This pulls DL low, turning off the low-side
FET, and DH is pulled high, turning on the high-side FET
(once the cross-current control allows it). When the oscil-
lator voltage rises back above the error amplifier output
voltage, the comparator output goes low. This pulls DH
low, turning off the high-side FET, and DL is pulled high,
turning on the low-side FET (once the cross-current con-
trol allows it).
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the on-
time of the high-side MOSFET connected to DH, hence
lowering the output voltage.
Under Voltage Lockout
The under voltage lockout circuit of the SC1102 assures
that the high-side MOSFET driver outputs remain in the
off state whenever the supply voltage drops below set
parameters. Lockout occurs if VCC falls below 4.1V. Nor-
mal operation resumes once VCC rises above 4.2V.
Over-Voltage Protection
The over-voltage protection pin (OVP) is high only when
the voltage at SENSE is 20% higher than the target value
programmed by the external resistor divider. The OVP pin
is internally connected to a PNP’s collector.
Power Good
The power good function is to confirm that the regulator
outputs are within +/-10% of the programmed level.
PWRGD remains high as long as this condition is met.
PWRGD is connected to an internal open collector NPN
transistor.
2006 Semtech Corp.
5
www.semtech.com

5 Page





SC1102A arduino
POWER MANAGEMENT
Evaluation Board Schematic
SC1102/SC1102A
2006 Semtech Corp.
11
www.semtech.com

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