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Número de pieza | HD74HC323 | |
Descripción | 8-bit Universal Shift/Storage Register (with 3-state Outputs) | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74HC323 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! HD74HC323
8-bit Universal Shift/Storage Register (with 3-state Outputs)
Description
This eight-bit universal register features multiplexed I/O ports to achieve full eight bit data handling in a
single 20-pin package. HD74HC323 applications are as stacked or push-down registers, buffer storage, and
accumulator registers.
Two function-select inputs and two output control inputs can be used to choose the modes of operation
listed in the function table.
Synchronous parallel loading is accomplished by taking both function-select lines S0 and S1 high. This
places the three-state outputs in a high-impedance state, which permits data that is applied on the I/O ports
to be clocked into the register. Reading out of this register can be accomplished while the outputs are
enabled in any mode. The clear function is synchronous, and a low level at the clear input clears the
register on the next low-to-high transition of the clock.
Features
• High Speed Operation: tpd (Clock to Q) = 20 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
1 page HD74HC323
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Maximum clock
frequency
Symbol
f max
VCC (V)
2.0
4.5
Min Typ Max Min
——5 —
— — 27 —
Max Unit Test Conditions
4 MHz
21
6.0 — — 31 — 24
Propagation delay tPLH
time
t PHL
2.0 — — 150 — 190 ns Clock to QA’ or QH’
4.5 — 18 30 — 38
6.0 — — 26 — 33
2.0 — — 175 — 220 ns Clock to Q
4.5 — 20 35 — 44
6.0 — — 30 — 37
Output enable
time
t ZH
t ZL
2.0 — — 150 — 190 ns
4.5 — 14 30 — 38
6.0 — — 26 — 33
Output disable
time
t HZ
t LZ
2.0 — — 150 — 190 ns
4.5 — 15 30 — 38
6.0 — — 26 — 33
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns QA’, QH’
4.5 — 5 15 — 19
6.0 — — 13 — 16
2.0 — — 60 — 75 ns Q
4.5 — 4 12 — 15
6.0 — — 10 — 13
Input capacitance Cin — — 5 10 — 10 pF
5
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet HD74HC323.PDF ] |
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HD74HC323 | 8-bit Universal Shift/Storage Register (with 3-state Outputs) | Hitachi Semiconductor |
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