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PDF HD74HC237 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC237 | |
| Descripción | 3-to-8-line Decoder/Demultiplexer with Address Latch | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HC237
3-to-8-line Decoder/Demultiplexer with Address Latch
Description
The HD74HC237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a
transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are
provided to facilitate the demultiplexing, cascading, and chip-selecting functions.
The demultiplexing function is accomplished by using the Address inputs to select the desired device
output, and then by using one of the Chip Selects as a data input while holding the other one active.
The HD74HD237 is the noninverting version of the HD74HC137.
Features
• High Speed Operation: tpd (Data to Y) = 19 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
1 page  
HD74HC237
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Symbol
Propagation delay tPLH
time
t PHL
VCC (V)
2.0
4.5
6.0
Min Typ Max Min
— — 185 —
— 19 37 —
— — 31 —
Max Unit
230 ns
46
39
2.0 — — 145 — 180 ns
4.5 — 14 29 — 36
6.0 — — 25 — 31
2.0 — — 145 — 180 ns
4.5 — 14 29 — 36
6.0 — — 25 — 31
2.0 — — 190 — 240 ns
4.5 — 21 38 — 48
6.0 — — 32 — 41
Pulse width tw 2.0 80 — — 100 — ns
4.5 16 8 — 20 —
6.0 14 — — 17 —
Hold time
th 2.0 5 — — 5 — ns
4.5 5 –4 — 5 —
6.0 5 — — 5 —
Setup time
tsu 2.0 75 — — 95 — ns
4.5 15 4 — 19 —
6.0 13 — — 16 —
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
Test Conditions
Data to Y
G2 to Y
G1 to Y
GL to Y
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HD74HC237.PDF ] | |
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