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PDF HD74HC109 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC109 | |
| Descripción | Dual J-K Flip-Flops (with Preset and Clear) | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HC109
Dual J-K Flip-Flops (with Preset and Clear)
Description
Each flip-flop has independent J, K, preset, clear and clock inputs and Q and Q outputs. This device is
edge sensitive to the clock input and changes state on the positive going transition of the clock pulse. Clear
and preset are independent of the clock and accomplished by a low logic level on the corresponding input.
Features
• High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs
Output
Preset
Clear
Clock
J
K
Q
Q
LH X X X H L
HL X X X L H
L L X X X H*1 H*1
HH
LLL H
HH
H L Toggle
HH
HH
L H Q0 Q0
HHH L
H
Note:
HL
X X Q0 Q0
1. Q and Q will remain high as long as preset and clear input are low, but Q and Q are
unpredictable if preset and clear input go high simultaneously.
1 page  
19.20
20.00 Max
16
9
1
1.3
1.11 Max
8
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
–
0.13
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-16
Conforms
Conforms
1.07 g
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HD74HC109.PDF ] | |
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