ADP3650 Datasheet PDF - Analog Devices
| Part Number | ADP3650 | |
| Description | 12V MOSFET Driver | |
| Manufacturers | Analog Devices | |
| Logo |  |
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FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anti-crossconduction protection circuitry
OD for disabling the driver outputs
APPLICATIONS
Telecom and datacom networking
Industrial and medical systems
Point of load conversion: memory, DSP, FPGA, ASIC
Dual, Bootstrapped, 12 V MOSFET
Driver with Output Disable
ADP3650
GENERAL DESCRIPTION
The ADP3650 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a
nonisolated synchronous buck power converter. Each driver is
capable of driving a 3000 pF load with a 45 ns propagation delay
and a 25 ns transition time. One of the drivers can be boot-
strapped and is designed to handle the high voltage slew rate
associated with floating high-side gate drivers. The ADP3650
includes overlapping drive protection to prevent shoot-through
current in the external MOSFETs.
The OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.
The ADP3650 is specified over the temperature range of −40°C
to +85°C and is available in 8-lead SOIC_N and 8-lead LFCSP_VD
packages.
FUNCTIONAL BLOCK DIAGRAM
12V
ADP3650
IN 2
VCC
4
DELAY
LATCH
R1
R2 Q
S
OD 3
CMP
1V
DELAY
CMP
VCC
6
CONTROL
LOGIC
Figure 1.
D1
BST
1
CBST1
DRVH
8
CBST2
RG
Q1
SW
7
RBST
TO
INDUCTOR
DRVL
5
PGND
6
Q2
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2010 Analog Devices, Inc. All rights reserved.
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ABSOLUTE MAXIMUM RATINGS
All voltages are referenced to PGND, unless otherwise noted.
Table 2.
Parameter
VCC
BST
DC
<200 ns
BST to SW
SW
DC
<200 ns
DRVH
DC
<200 ns
DRVL
DC
<200 ns
IN, OD
Operating Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.3 V to +15 V
−0.3 V to VCC + 15 V
−0.3 V to +35 V
−0.3 V to +15 V
−5 V to +15 V
−10 V to +25 V
SW − 0.3 V to BST + 0.3 V
SW − 2 V to BST + 0.3 V
−0.3 V to VCC + 0.3 V
−2 V to VCC + 0.3 V
−0.3 V to +6.5 V
−40°C to +85°C
0°C to 150°C
−65°C to +150°C
300°C
215°C
260°C
ADP3650
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
8-Lead SOIC_N (R-8)
2-Layer Board
4-Layer Board
8-Lead LFCSP_VD1 (CP-8-2)
4-Layer Board
θJA Unit
123 °C/W
90 °C/W
50 °C/W
1 For LFCSP_VD, θJA is measured per JEDEC STD with exposed pad soldered to PCB.
ESD CAUTION
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