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PDF HD74ALVCHR162269A Data sheet ( Hoja de datos )
| Número de pieza | HD74ALVCHR162269A | |
| Descripción | 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74ALVCHR162269A
12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs
ADE-205-125 (Z)
Preliminary
1st. Edition
January 1998
Description
The HD74ALVCHR162269A is a 12-bit to 24-bit registered bus exchanger, which is intended for
applications where two separate ports must be multiplexed onto, or de-multiplexed from, a single port. It is
particularly suitable as an interface between synchronous DRAMs and high speed microprocessors. The
HD74ALVCHR162269A is designed specifically for low voltage (from 2.5 V to 3.3 V) VCC operation.
Data is stored in the internal B-port registers on the low to high transition of the CLK input, provided that
the appropriate CLKENA inputs are low. Proper control of these inputs allows two sequential 12-bit words
to be presented as a 24-bit word on the B-port. For data transfer in the B to A direction, a single storage
register is provided. The SEL line selects 1B or 2B data for the A outputs.
The register on the A output permits the fastest possible data transfer, thus extending the period that the
data will be valid on the bus. The control pins are registered so that all transactions are synchronous with
the clock. Data flows is controlled by the active low output enables (OEA, OEB1, OEB2).
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
All outputs, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and
undershoot.
Features
• All outputs have equivalent 26 Ω series resistors, so no external resistors are required.
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors.
1 page  
Logic Diagram
CLK
OEB1
OEB2
CLKENA1
CLKENA2
SEL
OEA
1D
C1
C1
A1
1D
HD74ALVCHR162269A
C1
1D
C1 SEL
1D
C1
1D
G1
1
1
CE
C1
1D
CE
C1
1D
1 of 12 Channels
1B1
2B1
5
5 Page 
Waveforms – 3
Output
Control
CLK
tr tf
10 %
90 % 90 %
Vref
10 %
HD74ALVCHR162269A
VIH
GND
VIH
Vref
GND
Waveform - A
Waveform - B
tZL
Vref
tZH
Vref
tLZ
VOL + 0.3 V
tHZ
VOH – 0.3 V
≈VOH1
VOL
VOH
≈VOL1
TEST
VIH
Vref
VOH1
VOL1
Vcc=2.5±0.2V
2.3 V
1.2 V
2.3 V
GND
Vcc=2.7V,
3.3±0.15V
2.7 V
1.5 V
3.0 V
GND
Note: 1. All input pulses are supplied by generators having the following characteristics: PRR ≤
10MHz, Zo = 50Ω, tr ≤ 2.5ns, tf ≤ 2.5ns.
2. Waveform – A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The outputs are measured one at a time with one transition per measurement.
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet HD74ALVCHR162269A.PDF ] | |
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