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Número de pieza | HD74ALVCH16270 | |
Descripción | 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74ALVCH16270 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
No Preview Available ! HD74ALVCH16270
12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs
ADE-205-137 (Z)
Preliminary 1st. Edition
May 1996
Description
The HD74ALVCH16270 is used in applications where data must be transferred from a narrow high
speed bus to a wide lower frequency bus. The device provides synchronous data exchange between the
two ports. Data is stored in the internal registers on the low to high transition of the clock (CLK) input
when the appropriate CLKEN inputs are low. The select (SEL) line selects 1B or 2B data for the A
outputs. For data transfer in the A to B direction, a two stage pipeline is provided in the A to 1B path,
with a single storage register in the A to 2B path. Proper control of the CLKENA inputs allows two
sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is
controlled by the active low output enables (OEA, OEB). The control terminals are registered to
synchronize the bus direction changes with CLK. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
1 page Logic Diagram
CLK
CLKEN1B
CLKEN2B
CLKENA1
CLKENA2
OEB
SEL
OEA
29
2
27
30
55
56
28
1
8
A1
1D
C1
G1
1
1
CE
C1
1D
1 of 12 Channels
HD74ALVCH16270
C1
1D
CE
C1
1D
CE
C1
1D
CE
C1
1D
CE
C1
1D
23
1B1
6
2B1
5 Page HD74ALVCH16270
• Waveforms – 3
tf
Output
Control
90 %
Vref
10 %
tZL
Waveform - A
Vref
tZH
Waveform - B
Vref
tr
10 %
90 %
Vref
tLZ
tHZ
VOL + 0.3 V
VOH – 0.3 V
VIH
GND
≈VOH1
VOL
VOH
≈VOL1
TEST
VIH
Vref
VOH1
VOL1
Vcc=2.5±0.2V
2.3 V
1.2 V
2.3 V
GND
Vcc=2.7V,
3.3±0.3V
2.7 V
1.5 V
3.0 V
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet HD74ALVCH16270.PDF ] |
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