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PDF HD6413308 Data sheet ( Hoja de datos )
| Número de pieza | HD6413308 | |
| Descripción | Hitachi Single-Chip MicroComputer | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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To all our customers
Regarding the change of names mentioned in the document, such as
Hitachi Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were
transferred to Renesas Technology Corporation on April 1st 2003.
These operations include microcomputer, logic, analog and discrete devices,
and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors,
and other Hitachi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp.
Thank you for your understanding. Except for our corporate trademark,
logo and corporate statement, no changes whatsoever have been made to the
contents of the document, and these changes do not constitute any alteration
to the contents of the document itself.
Renesas Technology Home Page: www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Renesas Technology Corp.
1 page  
3.5.8 Block Data Transfer Instruction .............................................................................. 50
3.6 CPU States ............................................................................................................................ 51
3.6.1 Program Execution State ......................................................................................... 52
3.6.2 Exception-Handling State........................................................................................ 52
3.6.3 Power-Down State ................................................................................................... 53
3.7 Access Timing and Bus Cycle .............................................................................................. 53
3.7.1 Access to On-Chip Memory (RAM and ROM) ...................................................... 53
3.7.2 Access to On-Chip Register Field and External Devices ........................................ 55
Section 4. Exception Handling............................................................................................ 59
4.1 Reset ..................................................................................................................................... 60
4.2 Interrupts............................................................................................................................... 63
4.2.1 Interrupt-Related Registers...................................................................................... 69
4.2.2 External Interrupts ................................................................................................... 70
4.2.3 Internal Interrupts .................................................................................................... 71
4.2.4 Interrupt Response Time.......................................................................................... 72
4.2.5 Note on Stack Handling........................................................................................... 73
4.2.6 Deferring of Interrupts............................................................................................. 75
Section 5. I/O Ports ................................................................................................................ 77
5.1 Overview............................................................................................................................... 77
5.2 Port 1..................................................................................................................................... 78
5.3 Port 2..................................................................................................................................... 81
5.4 Port 3..................................................................................................................................... 84
5.5 Port 4..................................................................................................................................... 88
5.6 Port 5..................................................................................................................................... 91
5.7 Port 6..................................................................................................................................... 96
5.8 Port 7..................................................................................................................................... 102
5.9 Port 8..................................................................................................................................... 104
5.10 Port 9..................................................................................................................................... 114
Section 6. 16-Bit Free-Running Timer..............................................................................123
6.1 Overview............................................................................................................................... 123
6.1.1 Features.................................................................................................................... 123
6.1.2 Block Diagram......................................................................................................... 123
6.1.3 Input and Output Pins .............................................................................................. 125
6.1.4 Register Configuration ............................................................................................ 125
6.2 Register Descriptions............................................................................................................ 126
ii
5 Page 
Table
Table 1-1
Table 1-2
Table 1-3
Product Lineup ...................................................................................................... 5
Pin Assignments in Each Operating Mode (1)...................................................... 9
Pin Functions (1) ................................................................................................... 12
Table 2-1
Table 2-2
Operating Modes ................................................................................................... 17
Mode and System Control Registers..................................................................... 21
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Table 3-5
Table 3-6
Table 3-7
Table 3-8
Table 3-9
Instruction Classification....................................................................................... 34
Data Transfer Instructions ..................................................................................... 36
Arithmetic Instructions.......................................................................................... 38
Logic Operation Instructions................................................................................. 39
Shift Instructions ................................................................................................... 39
Bit-Manipulation Instruction (1) ........................................................................... 41
Branching Instructions .......................................................................................... 47
System Control Instructions .................................................................................. 49
Block Data Transfer Instruction/EEPROM Write Operation................................ 50
Table 4-1
Table 4-2
Table 4-3
Table 4-4
Reset and Interrupt Exceptions ............................................................................. 59
Interrupts ............................................................................................................... 64
Registers Read by Interrupt Controller ................................................................. 69
Number of States before Interrupt Service............................................................ 73
Table 5-1
Table 5-2
Table 5-3
Table 5-4
Table 5-5
Table 5-6
Table 5-7
Table 5-8
Table 5-9
Table 5-10
Table 5-11
Table 5-12
Table 5-13
Table 5-14
Auxiliary Functions of Input/Output Ports............................................................ 78
Functions of Port 1 ................................................................................................ 78
Port 1 Registers ..................................................................................................... 79
Functions of Port 2 ................................................................................................ 81
Port 2 Registers ..................................................................................................... 82
Functions of Port 3 ................................................................................................ 84
Port 3 Registers ..................................................................................................... 85
Port 4 Pin Functions (Mode 1 to 3) ....................................................................... 88
Port 4 Registers ..................................................................................................... 88
Port 5 Pin Functions (Mode 1 to 3) ....................................................................... 91
Port 5 Registers ..................................................................................................... 92
Port 6 Pin Functions .............................................................................................. 96
Port 6 Registers ..................................................................................................... 97
Port 7 Pin Functions (Mode 1 to 3) ....................................................................... 103
viii
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