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SAM3N00A fiches techniques PDF

ATMEL Corporation - SMART ARM-based MCU

Numéro de référence SAM3N00A
Description SMART ARM-based MCU
Fabricant ATMEL Corporation 
Logo ATMEL Corporation 





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SAM3N00A fiche technique
SAM3N Series
Atmel | SMART ARM-based MCU
DATASHEET
Description
The Atmel® | SMART SAM3N series is a member of a family of Flash
microcontrollers based on the high performance 32-bit ARM® Cortex®-M3 RISC
processor. It operates at a maximum speed of 48 MHz and features up to
256 Kbytes of Flash and up to 24 Kbytes of SRAM. The peripheral set includes 2
USARTs, 2 UARTs, 2 TWIs, 3 SPIs, as well as a PWM timer, two 3-channel
general-purpose 16-bit timers, an RTC, a 10-bit ADC, and a 10-bit DAC.
The SAM3N devices have three software-selectable low-power modes: Sleep,
Wait and Backup. In Sleep mode, the processor is stopped while all other
functions can be kept running. In Wait mode, all clocks and functions are stopped
but some peripherals can be configured to wake up the system based on
predefined conditions. In Backup mode, only the RTC, RTT, 256-bit GPBR, and
wake-up logic are running.
The Real-time Event Managment allows peripherals to receive, react to and send
events in Active and Sleep modes without processor intervention.
The SAM3N series is ready for capacitive touch thanks to the Atmel QTouch®
library, offering an easy way to implement buttons, wheels and sliders.
The SAM3N device is an entry-level general purpose microcontroller. That makes
the SAM3N the ideal starting point to move from 8-/16-bit to 32-bit
microcontrollers.
It operates from 1.62V to 3.6V and is available in 48-pin, 64-pin and 100-pin QFP,
48-pin and 64-pin QFN, and 100-pin BGA packages.
The SAM3N series is the ideal migration path from the SAM3S for applications
that require a reduced BOM cost. The SAM3N series is pin-to-pin compatible with
the SAM3S series. Its aggressive price point and high level of integration pushes
its scope of use far into cost-sensitive, high-volume applications.
Atmel-11011C-ATARM-SAM3N-Series-Datasheet_16-Apr-15

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