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PDF 24C64 Data sheet ( Hoja de datos )
| Número de pieza | 24C64 | |
| Descripción | Supervisory Circuits with I2C Serial CMOS E2PROM / Precision Reset Controllerand Watchdog Timer | |
| Fabricantes | CatalystSemiconductor | |
| Logotipo |  |
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Advanced
CAT24C321/322(32K), CAT24C641/642(64K)
Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer
FEATURES
s Watchdog Timer on SDA for 24C321/641
s Programmable Reset Threshold
s 400 KHz I2C Bus Compatible
s 2.7 to 6 Volt Operation
s Low Power CMOS Technology
s 32 - Byte Page Write Buffer
s Built-in inadvertent write protection
— VCC Lock Out
DESCRIPTION
The CAT24CXXX is a single chip solution to three
popular functions of EEPROM memory, precision reset
controller and watchdog timer. The 24C321/322(32K)
and 24C641/642(64K) feature a I2C Serial CMOS
EEPROM. Catalyst's advanced CMOS technology sub-
stantially reduces device power requirements. The
24CXXX features a 32-byte page and is available in 8-pin
DIP or 8-pin SOIC packages.
PIN CONFIGURATION
24C321/322*
24C641/642*
DC
RESET
WP
VSS
VCC
RESET
SCL
SDA
*All products offered in P and J packages
PIN FUNCITONS
Pin Name
SDA
RESET/RESET
SCL
Vcc
DC
VSS
WP
Function
Serial Data/Address
Reset I/O
Clock Input
Power Supply
Do not Connect
Ground
Write Protect
s Active High or Low Reset Outputs
— Precision Power Supply Voltage Monitoring
— 5V, 3.3V and 3V options
s 1,000,000 Program/Erase Cycles
s 100 Year Data Retention
s 8-Pin DIP or 8-Pin SOIC
s Commercial, Industrial and Automotive
Temperature Ranges
The reset function of the 24CXXX protects the system
during brown out and power up/down conditions. During
system failure the watchdog timer feature protects the
microcontroller with a reset signal. 24CXXX features
active low reset on pin 2 and active high reset on pin 7.
24C321/641 features watchdog timer on the SDA line.
24C322/642 does not feature the watchdog timer func-
tion.
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
VSS
DOUT
ACK
WORD ADDRESS
BUFFERS
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
SDA
START/STOP
LOGIC
XDEC
E2PROM
CONTROL
WP LOGIC
Only for
24C321/641
RESET Controller
High
Precision
WATCHDOG
Vcc Monitor
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
SCL
© 1998 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
9-1
RESET/RESET
24C1601 BLOCK
Doc. No. 25083-00 12/98
1 page  
Advanced
CAT24C321/322/641/642
PIN DESCRIPTIONS
WP: WRITE PROTECT
If the pin is tied to VCC the entire memory array becomes
Write Protected (READ only). When the pin is tied to VSS
or left floating normal read/write operations are allowed
to the device.
SCL: SERIAL CLOCK
The serial clock input clocks all data transferred into or
out of the device.
RESET/RESET: RESET I/O
These are open drain pins and can be used as reset
trigger inputs. By forcing a reset condition on the pins the
device will initiate and maintain a reset condition for
approximately 200ms. RESET pin must be connected
through a pull-down and RESET pin must be connected
through a pull-up device.
SDA: SERIAL DATA/ADDRESS
The bidirectional serial data/address pin is used to
transfer all data into and out of the device. The SDA pin
is an open drain output and can be wire-ORed with other
open drain or open collector outputs. In the 24C321/
641, the SDA line is also used as the Watchdog Timer
Monitor.
DEVICE OPERATION
Reset Controller Description
The CAT24CXXX provides a precision RESET control-
ler that ensures correct system operation during brown-
out and power-up/down conditions. It is configured
with open drain RESET outputs. During power-up, the
RESET outputs remain active until VCC reaches the
VTH threshold and will continue driving the outputs for
approximately 200ms (tPURST) after reaching VTH. After
the tPURST timeout interval, the device will cease to drive
reset outputs. At this point the reset outputs will be
pulled up or down by their respective pull up/pull down
devices. During power-down, the RESET outputs will
begin driving active when VCC falls below VTH. The
RESET outputs will be valid so long as VCC is >1.0V
(VRVALID).
The RESET pins are I/Os; therefore, the CAT24CXXX
can act as a signal conditioning circuit for an externally
applied reset. The inputs are level triggered; that is, the
RESET input in the 24CXXX will initiate a reset timeout
after detecting a high and the RESET input in the
24CXXX will initiate a reset timeout after detecting a low.
Watchdog Timer
The Watchdog Timer provides an independent protec-
tion for microcontrollers. During a system failure, the
CAT24C321/641 will respond with a reset signal after a
time-out interval of 1.6 seconds for lack of activity.
24CXX1 is designed with the Watchdog Timer feature
on the SDA input. For the 24C321/641, if the
microcontroller does not toggle the SDA input pin within
1.6 seconds the Watchdog Timer times out. This will
generate a reset condition on reset outputs. The Watch-
dog Timer is cleared by any transition on SDA.
As long as the reset signal is asserted, the Watchdog
Timer will not count and will stay cleared. 24C322/642
does not feature the Watchdog Timer function.
Figure 1. RESET Output Timing
t
GLITCH
VTH
VRVALID
VCC
tPURST
t RPD
tPURST
RESET
t RPD
RESET
Doc. No. 25083-00 12/98
5
5 Page 
Advanced
Ordering Information
Prefix Device #
CAT 2 4 C 3 2 2
Suffix
J
I
CAT24C321/322/641/642
-30 TE13
Optional
Company ID
Product
Number
24C321: 32K
24C322: 32K
24C641: 64K
24C642: 64K
Temperature Range
Blank = Commercial (0˚ to 70˚C)
I = Industrial (-40˚ to 85˚C)
A = Automotive (-40˚to +105˚C)*
Tape & Reel
TE13: 2000/Reel
Package
P: PDIP
J: SOIC (JEDEC)
* -40˚ to +125˚C is available upon request
Reset Threshold
Voltage
45: 4.5-4.75V
42: 4.25-4.5V
30: 3.0-3.15V
28: 2.85-3.0V
25: 2.55-2.7V
Note:
(1) The device used in the above example is a CAT24C322JI-30TE13 (32K I2C Memory, SOIC, Industrial Temperature, 3.0-3.15V Reset
Threshold Voltage, Tape and Reel)
Doc. No. 25083-00 12/98
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 24C64.PDF ] | |
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