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PDF RDC-19220S Data sheet ( Hoja de datos )
| Número de pieza | RDC-19220S | |
| Descripción | 16-BIT MONOLITHIC TRACKING RESOLVER-TO-DIGITAL (R/D) CONVERTER | |
| Fabricantes | Data Device Corporation | |
| Logotipo |  |
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RDC-19220/2S
16-BIT MONOLITHIC TRACKING
RESOLVER-TO-DIGITAL (R/D) CONVERTER
DESCRIPTION
The RDC-19220/2S is a lo w-cost, v ersatile, state-of-the-ar t 16-bit
monolithic Resolver-to-Digital (R/D) con verter. This single chip con-
verter off ers prog rammable f eatures such as resolution, bandwidth
and velocity output scaling.
Resolution prog ramming allo ws selection of 10, 12, 14, or 16 bits ,
with accuracies to 1.3 minutes. This feature combines the high track-
ing rate of a 10-bit converter with the precision and lo w-speed veloc-
ity resolution of a 16-bit con verter in one package.
The internal Synthesized Reference section eliminates errors due to
quadrature voltage. Previously, a 6 deg ree phase shift caused prob-
lems f or a 16-bit con verter. The synthesiz ed ref erence capability
ensures operation with a phase shift up to 45 deg rees. The velocity
output (VEL) from the RDC-19220/2S , which can be used to replace
a tachometer , is a 4 V signal ref erenced to g round. The full-scale
value of VEL is set by the user with a single resistor .
The RDC-19220/2S converter is available with operating temperature
ranges of 0° to +70°C, -40° to +85°C, and -55° to +125°C.
Make sure the next
Card you purchase
has...
®
FEATURES
• Accuracy up to 1.3 Arc Minutes
• Internal Synthesized Reference
• +5 Volt Only Option
• Programmable:
- Resolution: 10-, 12-, 14-, or 16-Bit
- Bandwidth
- Tracking Rate
• Differential Resolver Input Mode
• Velocity Output Eliminates
Tachometer
• Built-In-Test (BIT) Output,
No 180° Hangup
• -55° to +125°C Operating
Temperature
• Programmable for LVDT Input
APPLICATIONS
The low cost, small size, high accuracy, and versatile performance of
the RDC-19220/2S con verter makes it ideal f or use in moder n high
performance motion control systems . Typical applications include
motor control, radar antenna positioning, machine tool control, robot-
ics, and process control. Class K and MIL-PRF-38534 processing are
also available.
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7771
© 1999, 2000 Data Device Corporation
http://www.Datasheet4U.com
1 page  
THEORY OF OPERATION
The RDC-19220/2S series of converter is a single CMOS custom
monolithic chip . It is implemented using mix ed signal CMOS
technology which merges precision analog circuitr y with digital
logic to f orm a complete high-perf ormance tracking resolver-to-
digital con verter. For user fle xibility and con venience, the con-
verter bandwidth, dynamics , and v elocity scaling are e xternally
set with passive components.
FIGURE 1 is the RDC-19220/2S Functional Bloc k Diagram. The
converter operates with ±5 V DC power supplies. Analog signals
are ref erenced to analog g round, which is at g round potential.
The converter is made up of tw o main sections; a converter and
a digital interf ace. The converter front-end consists of sine and
cosine differential input amplifiers. These inputs are protected to
±25 V with 2 kΩ resistors and diode clamps to the ±5 V DC sup-
plies. These amplifiers f eed the high accur acy Control
Transformer (CT). Its other input is the 16-bit digital angle φ. Its
output is an analog error angle, or difference angle, between the
two inputs. The CT perf orms the r atiometric tr igonometric com-
putation of SIN θCOSφ - COSθSINφ = SIN(θ-φ) using amplifiers ,
switches, logic and capacitors in precision r atios.
Note: The transfer function of the CT is nor mally trigonometric, but in LVDT mode
the transfer function is triangular (linear) and could thereby convert any lin-
ear transducer output.
The con verter accur acy is limited b y the precision of the com-
puting elements in the CT . For enhanced accur acy, the CT in
these converters use capacitors in precision ratios, instead of the
more conventional precision resistor r atios. Capacitors used as
computing elements with op-amps need to be sampled to elimi-
nate voltage drifting. Therefore, the circuits are sampled at a high
rate (70 kHz) to eliminate this dr ifting and at the same time to
cancel out the op-amp offsets.
The error processing is perf ormed using the industr y standard
technique f or type II tr acking R/D con verters. The DC error is
integrated yielding a v elocity voltage which in tur n drives a volt-
age-controlled oscillator (VCO). This VCO is an incremental inte-
grator (constant v oltage input to position r ate output) which,
together with the v elocity integrator, forms a type II ser vo feed-
back loop. A lead in the frequency response is introduced to sta-
bilize the loop and a lag at higher frequency is introduced to
reduce the gain and ripple at the carr ier frequency and abo ve.
The settings of the v arious error processor gains and break fre-
quencies are done with external resistors and capacitors so that
the converter loop dynamics can be easily controlled by the user.
TRANSFER FUNCTION AND BODE PLOT
The dynamic perf ormance of the con verter can be deter mined
from its Transfer Function Bloc k Diag rams and its Bode Plots
(open and closed loop).These are shown in FIGURES 2, 3, and 4.
The open loop transfer function is as follows:
Open Loop Transfer Function =
( )A2
S +1
B
( )S2
S +1
10B
where:
A is the gain coefficient
A2 = A1A2
B is the frequency of lead compensation
The components of gain coefficient are error g radient, integrator
gain, and VCO gain. These can be broken down as follows:
- Error Gradient = 0.011 volts per LSB (CT+Error
Amp+Demod with 2 Vrms input)
- Integrator gain = CSFS volts per second per volt
1.1CBW
- VCO Gain = 1
LSBs per second per volt
1.25 RvCvco
where:
Cs = 10 pF
Fs = 70 kHz when Rs = 30 k Ω
Fs = 100 kHz when Rs = 20 k Ω
Fs = 125 kHz when Rs = 15 k Ω
Cvco = 50 pF
RV, RB, and CBW are selected by the user to set velocity scaling
and bandwidth.
RESOLVER
INPUT
(θ)
CT
+
-
RB CBW
CBW /10
RV
RS
-VSUM
VEL
GAIN
DEMOD
R1
1
CS FS
11 mV/LSB
VEL
-VCO
50 pf
C VCO
±1.25 V
THRESHOLD
VCO
16 BIT
UP/DOWN
COUNTER
H=1
DIGITAL
OUTPUT
(φ)
Data Device Corporation
www.ddc-web.com
FIGURE 2. TRANSFER FUNCTION BLOCK DIAGRAM #1
5
RDC-19220/2S
K-07/05-0
5 Page 
TYPICAL INPUTS
FIGURES 8 through 10 illustr ate typical input configurations
EXTERNAL
REF
LO HI
R1
R3
R2
R4
S3 See Note 3.
S1
S2
S4
RESOLVER
See Note 3.
+S
-S
SIN
COS
-C
+C
-R +R
Note: Five external BW components
as shown in Figures 1 and 2
are necessary for the R/D to
function.
A GND
GND
1) Resistors selected to limit Vref peak to between 1.5 V and 5 V.
2) If external reference LO is grounded, then R3 and R4 are not
needed, and -R is connected to GND.
3) 10k ohms, 1 % series current limit resistors are recommended.
FIGURE 8. TYPICAL CONNECTIONS, 2 VOLT RESOLVER, DIRECT INPUT
R1
S3
R2
S1
R1
S2
R2
S4
-S SIN
+S
Note: Five external BW components
as shown in Figures 1 and 2
are necessary for the R/D to
+C function.
A GND
-C COS
R2 = 2
R1 + R2 X Volt
R1 + R2 should not load the Resolver too much; it is recommended that R2 = 10k.
R1 + R2 Ratio Errors will result in Angular Errors,
2 cycle, 0.1% Ratio Error = 0.029˚ Peak Error.
FIGURE 9. TYPICAL CONNECTIONS, X-VOLT RESOLVER, DIRECT INPUT
Data Device Corporation
www.ddc-web.com
11
RDC-19220/2S
K-07/05-0
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet RDC-19220S.PDF ] | |
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