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PDF HIP6602 Data sheet ( Hoja de datos )
| Número de pieza | HIP6602 | |
| Descripción | Dual Channel Synchronous-Rectified Buck MOSFET Driver | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HIP6602 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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NOTP(ORISESLCS6IO6B0ML1EM4,ESINSU®LDB6ES6DT1I4TFAUOD,TRaaEtnNaPdESRWIShOLeDD6eEU6tS1C4ITGBSN) S
Dual Channel Synchronous-Rectified
Buck MOSFET Driver
The HIP6602 is a high frequency, two power channel
MOSFET driver specifically designed to drive four power
N-Channel MOSFETs in a synchronous-rectified buck
converter topology. These drivers combined with a HIP63xx
series of Multi-Phase Buck PWM controller and Intersil’s
UltraFETs® form a complete core voltage regulator solution
for advanced microprocessors.
The HIP6602 drives both upper and lower gates over a
range of 5V to 12V. This drive-voltage flexibility provides the
advantage of optimizing applications involving trade-offs
between switching losses and conduction losses.
The output drivers in the HIP6602 have the capacity to
efficiently switch power MOSFETs at high frequencies. Each
driver is capable of driving a 3000pF load with a 30ns
propagation delay and 50ns transition time. This device
implements bootstrapping on the upper gates with only a
single external capacitor required for each power channel.
This reduces implementation complexity and allows the use
of higher performance, cost effective, N-Channel MOSFETs.
Adaptive shoot-through protection is integrated to prevent
both MOSFETs from conducting simultaneously.
Ordering Information
TEMP. RANGE
PART NUMBER
(°C)
PACKAGE PKG. NO.
HIP6602CB
0 to 85
14 Ld SOIC M14.15
HIP6602CB-T
14 Ld SOIC Tape and Reel
August 20 00
HIP6602
FN4838.1
Features
• Drives Four N-channel MOSFETs
• Adaptive Shoot-Through Protection
• Internal Bootstrap Devices
• Supports High Switching Frequency
- Fast Output Rise Time
- Propagation Delay 30ns
• Small 14-Lead SOIC Package
• 5V to 12V Gate-Drive Voltages for Optimal Efficiency
• Three-State Input for Bridge Shutdown
• Supply Under-Voltage Protection
Applications
• Core Voltage Supplies for Intel Pentium® III and AMD®
AthlonTM Microprocessors.
• High Frequency Low Profile DC/DC Converters
• High Current Low Voltage DC/DC Converters
Pinout
HIP6602CB
(SOIC)
TOP VIEW
PWM1 1
PWM2 2
GND 3
LGATE1 4
PVCC 5
PGND 6
LGATE2 7
14 VCC
13 PHASE1
12 UGATE1
11 BOOT1
10 BOOT2
9 UGATE2
8 PHASE2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright © Intersil Corporation 2000, 2005
® ® http://www.Datasheet4U.com
Pentium is a registered trademark of Intel Corporation.; AMD is a registered trademark of Advanced Micro Devices, Inc.
UltraFET® is a registered trademark of Intersil Corporation. Athlon™ is a trademark of Advanced Micro Devices, Inc.
1 page  
HIP6602
Functional Pin Descriptions
PWM1 (Pin 1) and PWM2 (Pin 2)
The PWM signal is the control input for the driver. The PWM
signal can enter three distinct states during operation, see the
three-state PWM Input section under DESCRIPTION for further
details. Connect this pin to the PWM output of the controller.
GND (Pin 3)
Bias and reference ground. All signals are referenced to this
node.
LGATE1 (Pin 4) and LGATE2 (Pin 7)
Lower gate drive outputs. Connect to gates of the low-side
power N-Channel MOSFETs.
PVCC (Pin 5)
This pin supplies the upper and lower gate drivers bias.
Connect this pin from +12V down to +5V.
PGND (Pin 6)
This pin is the power ground return for the lower gate
drivers.
PHASE2 (Pin 8) and PHASE1 (Pin 13)
Connect these pins to the source of the upper MOSFETs
and the drain of the lower MOSFETs. The PHASE voltage is
monitored for adaptive shoot-through protection. These pins
also provide a return path for the upper gate drive.
UGATE2 (Pin 9) and UGATE1 (Pin 12)
Upper gate drive outputs. Connect to gate of high-side
power N-Channel MOSFETs.
BOOT 2 (Pin 10) and BOOT 1 (Pin 11)
Floating bootstrap supply pins for the upper gate drivers.
Connect the bootstrap capacitor between these pins and the
Timing Diagram
PHASE pin. The bootstrap capacitor provides the charge to
turn on the upper MOSFETs. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in
choosing the appropriate capacitor value.
VCC (Pin 14)
Connect this pin to a +12V bias supply. Place a high quality
bypass capacitor from this pin to GND. To prevent forward
biasing an internal diode, this pin should be more positive
then PVCC during converter start-up.
Description
Operation
Designed for versatiltiy and speed, the HIP6602 two channel,
dual MOSFET driver controls both hgih-side and low-side
N-Channel FETs fromtwo externally provided PWM signals.
The upper and lower gates are held low until the driver is
initialized. Once the VCC voltage surpasses the VCC Rising
Threshold (See Electrical Specifications), the PWM signal
takes control of gate transitions. A rising edge on PWM
initiates the turn-off of the lower MOSFET (see Timing
Diagram). After a short propagation delay [TPDLLGATE], the
lower gate begins to fall. Typical fall times [TFLGATE] are
provided in the Electrical Specifications section. Adaptive
shoot-through circuitry monitors the LGATE voltage and
determines the upper gate delay time [TPDHUGATE] based
on how quickly the LGATE voltage drops below 1.0V. This
prevents both the lower and upper MOSFETs from
conducting simultaneously or shoot-through. Once this delay
period is complete the upper gate drive begins to rise
[TRUGATE] and the upper MOSFET turns on.
PWM
TPDHUGATE
UGATE
LGATE
TPDLLGATE
TFLGATE
5
TRUGATE
TPDLUGATE
TFUGATE
TPDHLGATE
TRLGATE
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HIP6602.PDF ] | |
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