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PDF HX8367-A Data sheet ( Hoja de datos )
| Número de pieza | HX8367-A | |
| Descripción | TFT Mobile Single Chip Driver | |
| Fabricantes | Himax | |
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DATA SHEET
( DOC No. HX8367-A-DS )
HX8367-A
240RGB x 320 dot, 262K color,
with internal GRAM,
TFT Mobile Single Chip Driver
Version 01 Januaryr, 2011
Free Datasheet http://www.Datasheet4U.com
1 page  
HX8367-A
240RGB x 320 dot, 262K color, with internal
GRAM, TFT Mobile Single Chip Driver
List of Figures
January, 2011
Figure 5.35 DOTCLK cycle ............................................................................................................... 46
Figure 5.36 RGB interface circuit input timing diagram .................................................................... 47
Figure 5.37 RGB mode timing diagram ............................................................................................ 48
Figure 5.38 RGB 18-bit/pixel on 6-bit Data width.............................................................................. 51
Figure 5.39 RGB 16-bit/pixel on 16-bit data width ............................................................................ 52
Figure 5.40 RGB 18-bit/pixel on 18-bit data width ............................................................................ 53
Figure 6.1 Image data sending order from host................................................................................ 56
Figure 6.2 Image data writing control................................................................................................ 56
Figure 6.3 Example1 for rotation with MY, MX and MV .................................................................... 59
Figure 6.4 Example2 for rotation with MY, MX and MV .................................................................... 60
Figure 6.5 Partial display when ML= ‘0’ ............................................................................................ 64
Figure 6.6 Partial display when ML= ‘1’ ............................................................................................ 64
Figure 6.7 Vertical scrolling ............................................................................................................... 65
Figure 6.8 Memory map of vertical scrolling 1 .................................................................................. 65
Figure 6.9 Memory map of vertical scrolling 2 .................................................................................. 66
Figure 6.10 Memory map of vertical scrolling 3 ................................................................................ 66
Figure 6.11 Vertical scrolling example............................................................................................... 67
Figure 6.12 Data streaming order in RGB I/F ................................................................................... 68
Figure 6.13 Updating order when MY = ‘0’ and MX = ‘0’ .................................................................. 69
Figure 6.14 Updating order when MY = ‘0’ and MX = ‘1’ .................................................................. 69
Figure 6.15 Updating order when MY = ‘1’ and MX = ‘0’ .................................................................. 70
Figure 6.16 Updating order when MY = ‘1’ and MX = ‘1’ .................................................................. 70
Figure 7.1 HX8367-A internal clock circuit ........................................................................................ 71
Figure 7.2 Gamma adjustments different of source driver with digital gamma correction ................ 72
Figure 7.3 Grayscale control ............................................................................................................. 73
Figure 7.4 Gamma resister stream and gamma reference voltage .................................................. 75
Figure 7.5 Relationship between source output and Vcom .............................................................. 92
Figure 7.6 Relationship between GRAM data and output level (normal white panel REV_Panel=“0”)
................................................................................................................................................... 92
Figure 7.7 Block diagram of digital gamma correction...................................................................... 93
Figure 7.8 TE mode 1 output ............................................................................................................ 94
Figure 7.9 TE delay output................................................................................................................ 94
Figure 7.10 TE mode 2 output .......................................................................................................... 95
Figure 7.11 TE output waveform ....................................................................................................... 95
Figure 7.12 Waveform of tearing effect signal .................................................................................. 96
Figure 7.13 Timing of tearing effect signal ........................................................................................ 96
Figure 7.14 Timing of MPU write is faster than panel read ............................................................... 97
Figure 7.15 Display of MPU write is faster than panel read.............................................................. 97
Figure 7.16 Timing of MPU write is slower than panel read.............................................................. 98
Figure 7.17 Display of MPU write is slower than panel read ............................................................ 98
Figure 7.18 Gate scan mode............................................................................................................. 99
Figure 7.19 Block diagram of HX8367-A power circuit ................................................................... 100
Figure 7.20 LCD power generation scheme ................................................................................... 102
Figure 7.21 Display on/off set flow .................................................................................................. 103
Figure 7.22 Standby mode setting flow........................................................................................... 104
Figure 7.23 Deep standby mode setting flow.................................................................................. 105
Figure 7.24 Power supply setting flow ............................................................................................ 106
Figure 8.1 Index register ..................................................................................................................114
Figure 8.2 Himax ID register (PAGE0 -00h).....................................................................................114
Figure 8.3 Display mode control register (PAGE0 -01h)..................................................................114
Figure 8.4 Column address start register upper byte (PAGE0 -02h)...............................................115
Figure 8.5 Column address start register low byte (PAGE0 -03h)...................................................115
Figure 8.6 Column address end register upper byte (PAGE0 -04h)................................................115
Figure 8.7 Column address end register low byte (PAGE0 -05h)....................................................116
Figure 8.8 Row address start register upper byte (PAGE0 -06h) ....................................................116
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.5-
January, 2011
Free Datasheet http://www.Datasheet4U.com
5 Page 
HX8367-A
240RGB x 320 dot, 262K color, TFT Mobile Single Chip Driver
2. Features
DATA SHEET V01
Single chip solution to drive a TFT LCD panel
Display Resolution: 240(H) x RGB(H) x 320(V)
Display Color modes
Normal Display Mode On
− System Interface Circuit
1. 4096(R (4), G (4), B (4)) colors
2. 65, 536(R (5), G (6), B (5)) colors
3. 262, 144(R (6), G (6), B (6)) colors
− RGB Interface Circuit
1. 65,536(R(5),G(6),B(5)) colors
2. 262,144(R(6),G(6),B(6)) colors
Idle Mode On
− 8 (R (1), G (1), B (1)) colors.
Outputs
Source outputs: 720 source lines.
Selectable gate line control signal for glass 320 gate lines
Adjusted source voltages (V0p ~V63p, V0n ~V63n)
Display interface:
System interface:
− 8-/9-/16-/18-bit parallel bus system interface
− 3-/4-wire serial bus system interface
RGB interface:
− 6-/16-/18-bit RGB interface
Internal graphics RAM capacity: 240 x18x320 bit = 1382400bits
Display features
The vertical scroll display function in line units
Partial area display mode.
Software programmable color depth mode
On chip
OTP memory to store initialization register settings
Automatic malfunction recovery for default values
Internal oscillator and hardware reset function
DC/DC converter and charge bump circuit for source, glass gate driving
voltage
Adjust AC VCOM generation
LCD Driving Inversion Algorithm
Himax Confidential
This information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosed
in whole or in part without prior written permission of Himax.
-P.11-
January, 2011
Free Datasheet http://www.Datasheet4U.com
11 Page | ||
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