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PDF ADP7142 Data sheet ( Hoja de datos )
| Número de pieza | ADP7142 | |
| Descripción | CMOS LDO | |
| Fabricantes | Analog Devices | |
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Preliminary Technical Data
40 V, 200 mA, Low Noise, CMOS LDO
ADP7142
FEATURES
Low Noise: 11 µVRMS independent of fixed output voltage
PSRR of 83 dB @ 10 KHz, 68 dB @ 100 KHz, 50 dB @ 1 MHz,
VOUT ≤5V, VIN = 7V
Input voltage range: 2.7 V to 40 V
Maximum output current: 200 mA
Low dropout voltage: 200 mV @ 200 mA load, VOUT = 5V
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2%
User programmable Soft Start (LFCSP and SOIC only)
Low Quiescent Current, IGND = 50 μA with no load
Low shutdown current: 1.5 μA @ VIN = 5 V, 3μA @ VIN = 40 V
Stable with small 2.2µF ceramic output capacitor
16 fixed output voltage options: 1.2V to 5.0V
Adjustable output from 1.2 V to VIN - VDO
Output may be adjusted above initial set point
Precision Enable
2x2mm, 6-lead LFCSP package, 8-Lead SOIC, 5-Lead TSOT
APPLICATIONS
Regulation to noise sensitive applications: ADC, DAC circuits,
Precision amplifiers, Power for VCO Vtune control
Communications and Infrastructure
Medical and Healthcare
Industrial and Instrumentation
GENERAL DESCRIPTION
The ADP7142 is a CMOS, low dropout linear regulator that
operates from 2.7 V to 40 V and provide up to 200 mA of output
current. These high input voltage LDOs are ideal for regulation of
high performance analog and mixed signal circuits operating from
40 V down to 1.2 V rails. Using an advanced proprietary
architecture, they provide high power supply rejection, low noise,
and achieve excellent line and load transient response with just a
small 2.2 µF ceramic output capacitor.
The ADP7142 is available in 16 fixed output voltage options. Each
fixed output voltage may be adjusted above the initial set point with
an external feedback divider. This allows the ADP7142 to provide
TYPICAL APPLICATION CIRCUITS
VIN=6V
CIN
2.2uF
VIN
VOUT
Sense/Adj
On
Off
SS
EN
GND
VOUT=5V
COUT
2.2uF
CSS
1nF
Figure 1. ADP7142 with Fixed Output Voltage, 5 V
VIN=7V
CIN
2.2uF
VIN
VOUT
Sense/Adj
VOUT=6V
2K
On
Off
SS 10K
EN
GND
CSS
1nF
Figure 2. ADP7142 with 5V Output Adjusted to 6 V
COUT
2.2uF
an output voltage from 1.2 V to VOUT - VDO with high PSRR and
low noise.
User programmable soft start with an external capacitor is available
in the LFCSP and SOIC packages.
The ADP7142 regulator output noise is 11 μVrms independent of
the output voltage for the fixed options of 5V or less. The
ADP7142 is available in a 6-lead, 2 mm × 2 mm LFCSP making
them not only very compact solutions, but also providing excellent
thermal performance for applications requiring up to 200 mA of
output current in a small, low-profile footprint. The ADP7142 is
also available in a 5-lead TSOT and an 8-lead SOIC.
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2014 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.Datasheet4U.com
1 page  
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VIN to GND
VOUT to GND
EN to GND
SENSE to GND
SS to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
–0.3 V to +44 V
–0.3 V to VIN
–0.3 V to VIN
–0.3 V to 6V
–0.3 V to VIN or 6V
(whichever is less)
–65°C to +150°C
–40°C to +125°C
–40°C to +85°C
JEDEC J-STD-020
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP7142 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
ADP7142
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The
specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit
™board. See JESD51-7 and JESD51-9 for detailed information
on the board construction.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power
flowing through multiple thermal paths rather than a single
path as in thermal resistance, θJB. Therefore, ΨJB thermal paths
include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Maximum junction temperature (TJ)
is calculated from the board temperature (TB) and power
dissipation (PD) using the formula
TJ = TB + (PD × ΨJB)
See JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA , θJC , and ΨJB are specified for the worst-case conditions, that
is, a device soldered in a circuit board for surface-mount
packages.
Table 3. Thermal Resistance
Package Type
θJA θJC ΨJB Unit
6-Lead LFCSP
72.1 42.3 47.1 °C/W
8-Lead SOIC
52.7 41.5 32.7 °C/W
5-Lead TSOT
170 n/a
43
°C/W
ESD CAUTION
Rev. PrD | Page 5 of 25
Free Datasheet http://www.Datasheet4U.com
5 Page 
Preliminary Technical Data
700
600
500
400
Ignd 5mA
300
200
Ignd 10mA
Ignd 50mA
Ignd 100mA
100
Ignd 150mA
Ignd 200mA
0
3.1 3.3 3.5 3.7 3.9
Vin (V)
Figure 24. Ground Current vs. Input Voltage (in Dropout) , VOUT = 3.3 V
1.4
2.7V
5V
10V
20V
1.3 40V
ADP7142 1.8V Soft Start Current vs Temperature
1.2
1.1
1
-45 -35 -25 -15 -5 5 15 25 35 45 55 65 75 85 95 105 115 125
Temperature (DegC)
Figure 25. Soft Start Current vs. Temperature, Different Input Voltage, VOUT =
5V
ADP7142 LFCSP PSRR, 3.3V/200mA
Different Headroom
0
-20
-40
-60
-80
-100
-120
10
3V
2V
1.6V
1.4V
1.2V
1V
800mV
700mV
600mV
500mV
100
1000
10000
100000
1000000
10000000
Frequency (Hz)
Figure 26. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.3 V, Various
Headroom voltage
ADP7142
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.4
10Hz
100Hz
1KHz
10KHz
100KHz
1MHz
10MHz
0.8
ADP7142 LFCSP PSRR vs Headroom Voltage
3.3V/200mA
Different Frequency
1.2 1.6
2
Frequency (Hz)
2.4
2.8
Figure 27. Power Supply Rejection Ratio vs. Headroom, VOUT = 3.3V, Different
Frequencies
0
3V
2V
1.6V
-20 1.4V
1.2V
1V
800mV
-40 700mV
600mV
500mV
-60
ADP7142 LFCSP PSRR, 5V/200mA
Different Headroom
-80
-100
-120
10
100
1000
10000
100000
1000000
10000000
Frequency (Hz)
Figure 28. Power Supply Rejection Ratio vs. Frequency, VOUT = 5 V, Various
Headroom voltage
ADP7142 LFCSP PSRR vs Headroom Voltage
5V/200mA
Different Frequency
0
10Hz
-10 100Hz
1KHz
10KHz
-20 100KHz
1MHz
-30 10MHz
-40
-50
-60
-70
-80
-90
-100
0.4 0.8 1.2 1.6
2
Frequency (Hz)
2.4 2.8
Figure 29. Power Supply Rejection Ratio vs. Headroom, VOUT = 5 V, Different
Frequencies
Rev. PrD | Page 11 of 25
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11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet ADP7142.PDF ] | |
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