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PDF HEF4894B Data sheet ( Hoja de datos )

Número de pieza HEF4894B
Descripción 12-stage shift-and-store register LED driver
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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HEF4894B
12-stage shift-and-store register LED driver
Rev. 8 — 22 November 2011
Product data sheet
1. General description
The HEF4894B is a 12-stage serial shift register. It has a storage latch associated with
each stage for strobing data from the serial input (D) to the parallel LED driver outputs
(QP0 to QP11). Data is shifted on positive-going clock (CP) transitions. The data in each
shift register stage is transferred to the storage register when the strobe (STR) input is
HIGH. Data in the storage register appears at the output whenever the output enable (OE)
input signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4894B
devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed
operation in cascaded systems with a fast clock rise time. The same serial data is
available at QS2 on the next negative going clock edge. This is used for cascading
HEF4894B devices when the clock has a slow rise time.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C and 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C.
Type number Package
Name
Description
HEF4894BP DIP20
plastic dual in-line package; 20 leads (300 mil)
HEF4894BT SO20
plastic small outline package; 20 leads; body width 7.5 mm
HEF4894BTT TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm
Version
SOT146-1
SOT163-1
SOT360-1

1 page




HEF4894B pdf
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
clock input
data input
strobe input
output enable
input
internal Q0S
(FF 1)
QP0 output
internal Q10S
(FF 11)
QP10 output
serial QS1
output
serial QS2
output
Fig 5. Timing diagram
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDD supply voltage
IIK
input clamping current
VI < 0.5 V or VI > VDD + 0.5 V
VI input voltage
IOK
output clamping current
QSn outputs; VO < 0.5 V or VO > VDD + 0.5 V
QPn outputs; VO < 0.5 V
II input leakage current
IO output current
QSn outputs
QPn outputs
Tstg
Tamb
Ptot
storage temperature
ambient temperature
total power dissipation
Tamb = 40 C to +125 C
DIP20 package
SO20 package
TSSOP20 package
P power dissipation
per output
Min
0.5
-
0.5
-
-
-
-
-
65
40
[1] -
[2] -
[3] -
-
[1] For DIP20 package: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO20 package: Ptot derates linearly with 8 mW/K above 70 C.
[3] For TSSOP20 package: Ptot derates linearly with 5.5 mW/K above 60 C.
001aag121
Max Unit
+18 V
10 mA
VDD + 0.5 V
10 mA
40 mA
10 mA
10 mA
40 mA
+150
C
+125
C
750 mW
500 mW
500 mW
100 mW
HEF4894B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 22 November 2011
© NXP B.V. 2011. All rights reserved.
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HEF4894B arduino
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
VI 90 %
input pulse
10 %
VSS
tr
VI
G
VDD
DUT
RT
tf
VEXT
RL
VO
CL
001aag804
Test data is given in Table 10.
Definitions for test circuit:
DUT = Device Under Test;
RL = Load resistance;
CL = load capacitance;
RT = Termination resistance should be equal to output impedance of Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Fig 10. Test circuit for measuring switching times
Table 10. Test data
Supply
Input
VDD
5 V to 15 V
VI
VDD
tr, tf
20 ns
VEXT
tPLZ, tPZL
VDD
tPLH, tPHL
open
Load
CL
50 pF
RL
1 k
HEF4894B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 22 November 2011
© NXP B.V. 2011. All rights reserved.
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