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Fairchild Semiconductor - Octal Buffer and Line Driver

Numéro de référence 74ALS541
Description Octal Buffer and Line Driver
Fabricant Fairchild Semiconductor 
Logo Fairchild Semiconductor 





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74ALS541 fiche technique
October 1986
Revised February 2000
DM74ALS541
Octal Buffer and Line Driver with 3-STATE Outputs
General Description
This octal buffer and line driver is designed to have the per-
formance of the DM74ALS240A series and, at the same
time, offer a pinout with inputs and outputs on opposite
sides of the package. This arrangement greatly enhances
circuit board layout. The 3-STATE control gate is a 2-input
NOR such that if either G1 or G2 is HIGH, all eight outputs
are in the high impedance state.
Features
s Advanced oxide-isolated ion-implanted Schottky TTL
process
s Switching performance is guaranteed over full tempera-
ture and VCC supply range
s Data flow-thru pinout (all inputs on opposite side from
outputs)
s P-N-P Inputs reduce DC loading
Ordering Code:
Order Number Package Number Package Description
DM74ALS541WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS541SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS541N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Input
G1 G2
A
HXX
XHX
LLL
L LH
H = HIGH Logic Level
L = LOW Logic Level
X = Don't Care (Either LOW or HIGH Logic Level)
Hi-Z = High Impedance (OFF) State
Output
Y
Hi-Z
Hi-Z
L
H
© 2000 Fairchild Semiconductor Corporation DS009171
www.fairchildsemi.com
Free
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