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PDF HEF4015B Data sheet ( Hoja de datos )
| Número de pieza | HEF4015B | |
| Descripción | Dual 4-bit static shift register | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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HEF4015B
Dual 4-bit static shift register
Rev. 9 — 21 March 2016
Product data sheet
1. General description
The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel
converter). Each shift register has a serial data input (D), a clock input (CP), four fully
buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input
(MR). Information present on D is shifted to the first register position, and all the data in
the register is shifted one position to the right on the LOW-to-HIGH transition of CP. A
HIGH on MR clears the register and forces Q0 to Q3 to LOW, independent of CP and D.
The clock input’s Schmitt trigger action makes the input highly tolerant of slower clock rise
and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C.
Complies with JEDEC standard JESD 13-B
3. Applications
Serial-to-parallel converter
Buffer stores
General purpose register
4. Ordering information
Table 1. Ordering information
All types operate from 40 C to +85 C.
Type number Package
Name
Description
HEF4015BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT109-1
1 page  
NXP Semiconductors
HEF4015B
Dual 4-bit static shift register
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD
VIH HIGH-level input voltage IO < 1 A
5V
10 V
15 V
VIL LOW-level input voltage IO < 1 A
5V
10 V
15 V
VOH HIGH-level output voltage IO < 1 A
5V
10 V
15 V
VOL LOW-level output voltage IO < 1 A
5V
10 V
15 V
IOH HIGH-level output current VO = 2.5 V 5 V
VO = 4.6 V
5V
VO = 9.5 V
10 V
VO = 13.5 V
15 V
IOL LOW-level output current VO = 0.4 V 5 V
VO = 0.5 V
10 V
VO = 1.5 V
15 V
II input leakage current
15 V
IDD supply current
IO = 0 A
5V
10 V
15 V
CI input capacitance
-
Tamb = 40 C
Min Max
3.5 -
7.0 -
11.0 -
- 1.5
- 3.0
- 4.0
4.95 -
9.95 -
14.95 -
- 0.05
- 0.05
- 0.05
- 1.7
- 0.52
- 1.3
- 3.6
0.52 -
1.3 -
3.6 -
- 0.3
- 20
- 40
- 80
--
Tamb = 25 C
Min Max
3.5 -
7.0 -
11.0 -
- 1.5
- 3.0
- 4.0
4.95 -
9.95 -
14.95 -
- 0.05
- 0.05
- 0.05
- 1.4
- 0.44
- 1.1
- 3.0
0.44 -
1.1 -
3.0 -
- 0.3
- 20
- 40
- 80
- 7.5
Tamb = 85 C Unit
Min Max
3.5 - V
7.0 - V
11.0 - V
- 1.5 V
- 3.0 V
- 4.0 V
4.95 - V
9.95 - V
14.95 - V
- 0.05 V
- 0.05 V
- 0.05 V
- 1.1 mA
- 0.36 mA
- 0.9 mA
- 2.4 mA
0.36 - mA
0.9 - mA
2.4 - mA
- 1.0 A
- 150 A
- 300 A
- 600 A
- - pF
HEF4015B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 21 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 14
5 Page 
NXP Semiconductors
HEF4015B
Dual 4-bit static shift register
14. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
HEF4015B v.9
Modifications:
20160321
Product data sheet
-
• Type number HEF4015BP (SOT38-4) removed.
HEF4015B v.8
HEF4015B v.8
Modifications:
20111121
Product data sheet
-
• Legal pages updated.
• Changes in “General description” and “Features and benefits”.
HEF4015B v.7
HEF4015B v.7
20110914
Product data sheet
-
HEF4015B v.6
HEF4015B v.6
20091103
Product data sheet
-
HEF4015B v.5
HEF4015B v.5
20090624
Product data sheet
-
HEF4015B v.4
HEF4015B v.4
20090127
Product data sheet
-
HEF4015B_CNV v.3
HEF4015B_CNV v.3
19950101
Product specification
-
HEF4015B_CNV v.2
HEF4015B_CNV v.2
19950101
Product specification
-
-
HEF4015B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 21 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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