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PDF FT232H Data sheet ( Hoja de datos )
| Número de pieza | FT232H | |
| Descripción | Single Channel Hi-Speed USB to Multipurpose UART/FIFO IC | |
| Fabricantes | Future Technology Devices | |
| Logotipo |  |
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Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
Future Technology
Devices International Ltd
FT232H Single Channel Hi-
Speed USB to Multipurpose
UART/FIFO IC
The FT232H is a single channel USB 2.0 Hi-
Speed (480Mb/s) to UART/FIFO IC. It has the
capability of being configured in a variety of
industry standard serial or parallel interfaces.
The FT232H has the following advanced
features:
Single channel USB to serial / parallel ports
with a variety of configurations.
Entire USB protocol handled on the chip. No
USB specific firmware programming required.
USB 2.0 Hi-Speed (480Mbits/Second) and Full
Speed (12Mbits/Second) compatible.
Multi-Protocol Synchronous Serial Engine
(MPSSE) to simplify synchronous serial protocol
(USB to JTAG, I2C, SPI (MASTER) or bit-bang)
design.
UART transfer data rate up to 12Mbaud.
(RS232 Data Rate limited by external level
shifter).
USB to asynchronous 245 FIFO mode for
transfer data rate up to 8 Mbyte/Sec.
USB to synchronous 245 parallel FIFO mode for
transfers upto 40 Mbytes/Sec
Supports a proprietary half duplex FT1248
interface with a configurable width, bi-
directional data bus (1, 2, 4 or 8 bits wide).
CPU-style FIFO interface mode simplifies CPU
interface design.
Fast serial interface option.
FTDI’s royalty-free Virtual Com Port (VCP) and
Direct (D2XX) drivers eliminate the
requirement for USB driver development in
most cases.
Adjustable receive buffer timeout.
Option for transmit and receive LED drive
signals.
Bit-bang Mode interface option with RD# and
WR# strobes
Highly integrated design includes 5V to
3.3/+1.8V LDO regulator for VCORE, integrated
POR function
Asynchronous serial UART interface option with
full hardware handshaking and modem
interface signals.
Fully assisted hardware or X-On / X-Off
software handshaking.
UART Interface supports 7/8 bit data, 1/2 stop
bits, and Odd/Even/Mark/Space/No Parity.
Auto transmit enable control for RS485 serial
applications using the TXDEN pin.
Operational mode configuration and USB
Description strings configurable in external
EEPROM over the USB interface.
Configurable I/O drives strength (4, 8, 12 or
16mA) and slew rate.
Low operating and USB suspend current.
Supports self powered, bus powered and high-
power bus powered USB configurations.
UHCI/OHCI/EHCI host controller compatible.
USB Bulk data transfer mode (512 byte packets
in Hi-Speed mode).
+1.8V (chip core) and +3.3V I/O interfacing
(+5V Tolerant).
Extended -40°C to 85°C industrial operating
temperature range.
Compact 48-pin Lead Free LQFP or QFN
package
Configurable ACBUS I/O pins.
Copyright © 2012 Future Technology Devices International Limited
1
Free Datasheet http://www.datasheet-pdf.com/
1 page  
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
Table of Contents
1 Typical Applications...................................................................... 2
1.1 Driver Support .................................................................................... 2
1.2 Part Numbers...................................................................................... 2
USB Compliant....................................................................................... 3
1.3 ............................................................................................................... 3
1.4 Applicable Documents ........................................................................ 3
2 FT232H Block Diagram ................................................................. 4
3 Device Pin Out And Signal Descriptions ........................................ 7
3.1 Schematic Symbol............................................................................... 7
3.2 FT232H Pin Descriptions .................................................................... 8
3.3 Signal Description............................................................................... 9
3.4 ACBUS Signal Option......................................................................... 13
3.5 Pin Configurations ............................................................................ 14
3.5.1 FT232H pins used in an UART interface......................................................................... 14
3.5.2 FT232H pins used in an FT245 Synchronous FIFO Interface............................................. 15
3.5.3 FT232H pins used in an FT245 Style Asynchronous FIFO Interface ................................... 16
3.5.4 FT232H can be configured as a Synchronous or Asynchronous Bit-Bang Interface. ............. 17
3.5.5 FT232H pins used in an MPSSE.................................................................................... 18
3.5.6 FT232H Pins used as a Fast Serial Interface .................................................................. 19
3.5.7 FT232H Pins Configured as a CPU-style FIFO Interface ................................................... 20
3.5.8 FT232H Pins Configured as a FT1248 Interface .............................................................. 21
4 Function Description................................................................... 22
4.1 Key Features..................................................................................... 22
4.2 Functional Block Descriptions ........................................................... 23
4.3 FT232 UART Interface Mode Description........................................... 24
4.3.1 RS232 Configuration .................................................................................................. 24
4.3.2 RS422 Configuration .................................................................................................. 25
4.3.3 RS485 Configuration .................................................................................................. 26
4.4 FT245 Synchronous FIFO Interface Mode Description ...................... 27
4.4.1 FT245 Synchronous FIFO Read Operation ..................................................................... 28
4.4.2 FT245 Synchronous FIFO Write Operation ..................................................................... 28
4.5 FT245 Style Asynchronous FIFO Interface Mode Description............ 29
4.6 FT1248 Interface Mode Description .................................................. 30
4.6.1 Bus Width Protocol Decode ......................................................................................... 31
4.6.2 FT1248: 1-bit interface............................................................................................... 32
4.7 Synchronous and Asynchronous Bit-Bang Interface Mode ................ 34
4.7.1 Asynchronous Bit-Bang Mode ...................................................................................... 34
Copyright © 2012 Future Technology Devices International Limited
5
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5 Page 
Document No.: FT_000288
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 1.8
Clearance No.: FTDI #199
Pin No. Name
Type
Description
EEPROM – Chip Select. Tri-State during device reset.
45 EECS I/O
Clock signal to EEPROM. Tri-State during device reset. When not in reset, this
44
EECLK
OUTPUT outputs the EEPROM clock.
EEPROM – Data I/O. Connect directly to Data-in of the EEPROM and to Data-out
43 EEDATA I/O of the EEPROM via a 2.2K resistor. Also, pull Data-Out of the EEPROM to VCCD
via a 10K resistor for correct operation. Tri-State during device reset.
Table 3.3 EEPROM Interface Group
Pin No. Name
13 ADBUS0
14 ADBUS1
15 ADBUS2
16 ADBUS3
17 ADBUS4
18 ADBUS5
19 ADBUS6
20 ADBUS7
21 ACBUS0
25 ACBUS1
26 ACBUS2
27 ACBUS3
28 ACBUS4
29 ACBUS5
Type
Description
Output
Configurable Output Pin, the default configuration is Transmit Asynchronous Data
Output.
Input
Configurable Input Pin, the default configuration is Receiving Asynchronous Data
Input.
Output
Configurable Output Pin, the default configuration is Request to Send Control
Output / Handshake Signal.
Input
Configurable Input Pin, the default configuration is Clear To Send Control Input /
Handshake Signal.
Output
Configurable Output Pin, the default configuration is Data Terminal Ready Control
Output / Handshake Signal.
Input
Configurable Input Pin, the default configuration is Data Set Ready Control Input /
Handshake Signal.
Input
Configurable Input Pin, the default configuration is Data Carrier Detect Control
Input.
Input
Configurable Input Pin, the default configuration is Ring Indicator Control Input.
When remote wake up is enabled in the EEPROM taking RI# low can be used to
resume the PC USB host controller from suspend. (Also see note 1, 2, 3 in section
4.12)
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Configurable ACBUS I/O Pin. Function of this pin is configured in the device
I/O EEPROM. If the external EEPROM is not fitted the default configuration is TriSt-PU.
See ACBUS Signal Options, Table 3.5.
Copyright © 2012 Future Technology Devices International Limited
11
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