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PDF HI-7159A Data sheet ( Hoja de datos )

Número de pieza HI-7159A
Descripción Microprocessor-Compatible/ 5-1/2 Digit A/D Converter
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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HI-7159A
Data Sheet
January 1999 File Number 2936.4
Microprocessor-Compatible, 5-1/2 Digit
A/D Converter
The Intersil HI-7159A is a monolithic A/D converter that uses
a unique dual slope technique which allows it to resolve input
changes as small as 1 part in 200,000 (10µV) without the use
of critical external components. Its digital autozeroing feature
virtually eliminates zero drift over temperature. The device is
fabricated in Intersil’ proprietary low noise BiMOS process,
resulting in exceptional linearity and noise performance. The
HI-7159A’s resolution can be switched between a high
resolution 200,000 count (51/2 digit) mode, and a high speed
20,000 count (41/2 digit) mode without any hardware
modifications. In the 41/2 digit uncompensated mode, speeds
of 60 conversions per second can be achieved. The HI-7159A
is designed to be easily interfaced with most microprocessors
through either of its three serial and one parallel interface
modes. In the serial modes, any one of four common baud
rates is available.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HI3-7159A-5
0 to 70 28 Ld PDIP
PKG.
NO.
E28.6
Features
±200,000 Count A/D Converter
• 2V Full Scale Reading With 10µV Resolution
• 15 Conversions Per Second in 51/2 Digit Mode
• 60 Conversions Per Second in 41/2 Digit Mode
• Serial or Parallel Interface Modes
• Four Selectable Baud Rates
• Differential Analog Input
• Differential Reference Input
• Digital Autozero
Applications
• Weigh Scales
• Part Counting Scales
• Laboratory Instruments
• Process Control/Monitoring
• Energy Management
• Seismic Monitoring
Pinout
HI-7159A
(PDIP)
TOP VIEW
VCC 1
INT OUT 2
INT IN 3
BUF OUT
CREF-
GUARD
CREF-
CREF+
CREF+
GUARD
VREF HI
4
5
6
7
8
9
VREF LO 10
AGND 11
VIN HI 12
VIN LO 13
VEE 14
28 SEL
27 XTAL
26 DGND
25 P7/BRS1
24 P6/BRS0
23 P5/SAD3
22 P4/SAD2
21 P3/SAD1
20 P2/SAD0
19 P1/SMS1
18 P0/SMS0
17 CS/SAD4
16 WR/TXD
15 RD/RXD
Functional Block Diagram
AGND VEE
VCC
XTAL
DGND
CINT
RINT
VREF HI
VREF LO
VIN HI
VIN LO
CREF
INTEGRATOR
-
+
COMPARATOR
+
-
CONTROL
SECTION
AND
LATCHES
BUFFER +
-
ANALOG SWITCHES
ANALOG
STATE
MACHINE
BUS
INTERFACE
UNIT
UART
8 BIT
BUS
CS
WR
RD
SEL
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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HI-7159A pdf
Pin Descriptions
PIN SYMBOL
1 VCC
2 INT OUT
3 INT IN
4 BUF OUT
5 CREF- Guard
6 CREF-
7 CREF+
8 CREF+ Guard
9 VREF HI
10 VREF LO
11 AGND
12 VIN HI
13 VIN LO
14 VEE
15 RD/RXD
16 WR/TXD
17 CS/SAD4
18 P0/SMS0
19 P1/SMS1
20 P2/SAD0
21 P3/SAD1
22 P4/SAD2
23 P5/SAD3
24 P6/BRS0
25 P7/BRS1
26 DGND
27 XTAL
28 SEL
HI-7159A
DESCRIPTION
Positive 5V Power Supply for analog and digital sections.
Integrator Output; external component terminal.
Integrator Input; external component terminal.
VIN HI Voltage Buffer Output; external component terminal.
Reference Capacitor guard ring terminal (negative).
Reference Capacitor negative terminal.
Reference Capacitor positive terminal.
Reference Capacitor guard ring terminal (positive).
Positive Reference Input terminal.
Negative Reference Input terminal.
Analog Ground (0V).
Positive Analog Input Voltage terminal.
Negative Analog Input Voltage terminal.
Negative 5V Power Supply for analog section.
Parallel Read; serial receive (modes 1 and 2), serial clock (mode 0).
Parallel Write; serial transmit (modes 1 and 2), serial receive/transmit (mode 0).
Chip Select (parallel and serial modes 0 and 1), serial address bit 4 (mode 2).
Parallel I/O Port (P0); serial mode select pin.
Parallel I/O Port (P1); serial mode select pin.
MODE
Serial Mode 0
Serial Mode 1
Serial Mode 2
Reserved
SMS0
0
0
1
1
SMS1
0
1
0
1
Parallel I/O Port (P2); serial address bit 0.
Parallel I/O Port (P3); serial address bit 1.
Parallel I/O Port (P4); serial address bit 2.
Parallel I/O Port (P5); serial address bit 3.
Parallel I/O Port (P6); serial baud rate select.
Parallel I/O Port (P7); serial baud rate select.
BAUD RATE
300
1200
9600
19200
BRS0
0
0
1
1
BRS1
0
1
0
1
Digital Ground (0V).
Oscillator Out; crystal connection pin (other crystal pin connected to VCC).
Select pin for parallel or serial operation.
Parallel
SEL = 1
Serial Modes SEL = 0
5

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HI-7159A arduino
HI-7159A
It may also be possible to directly program the host’s serial
hardware for operation at nonstandard baud rates, allowing
HI-7159A operation at any arbitrary frequency. For example:
50Hz AC rejection requires a 2MHz clock. At this frequency
the “9600” baud rate becomes 7812.5 baud. The host’s
UART must be programmed with the proper divider to
operate at this baud rate. The data clock (see Figure 2) is
defined as 16 times the baud rate, so the data clock of this
configuration would be 125kHz. The data clock can also be
determined by dividing the oscillator (clock) frequency by the
correct divider from Table 12.
TABLE 12. CRYSTAL DIVIDER RATIOS
BAUD RATE SELECTED
CRYSTAL DIVIDER
“300”
512
“1200”
128
“9600”
16
“19200”
8
The following equation determines the divider needed to
operate the HI-7159A at any given crystal frequency:
-f-DC----i-L-v--O-i-d--C-e----Kr--(--(-7-7--1-1--5--5--9-9--A--A---)-)- = f--C---D--R---i-Yv---i-Sd----Te---rA---(-L-H---(-o-H---s-o--t--s-U--t--A-U---R-A----TR----)-T----) = Data Clock
Once determined, the new divider must be written directly to
the Host’s UART. Most PC compatibles use an 8250 UART with
a 1.8432MHz crystal, so the proper divider for the 2MHz
example given above would be 15. Again, these considerations
apply only to Serial Modes 1 and 2. Parallel and Serial Mode 0
communication rates are independent of crystal frequency.
Conversion Time
The conversion time of the HI-7159A is a function of the
crystal frequency and the type of conversion being made.
The conversion times for fCLOCK = 2.4MHz are shown in
Table 13. At other clock frequencies the times may be
calculated from the following formula:
tCONV = f--C-----L--C-O----C-----K--
where the constant C is determined from Table 13.
f = 2.4MHz
C
TABLE 13. CONVERSION TIMES
51/2
COMP
CONVERSION TYPE
51/2
UNCOMP
41/2
COMP
41/2
UNCOMP
133ms 66.7ms 33.3ms 16.7ms
320,000 160,000 80,000 40,000
Component Selection
Three external passive components must be chosen for the
HI-7159A: the integrating capacitor (CINT), the integrating
resistor (RINT), and the reference capacitor (CREF). They are
chosen based on the crystal frequency, the reference voltage
(VREF), and the desired integrating current. Figure 8 illustrates
the analog components necessary for the HI-7159A to function.
VREF HI
REF LO
VIN HI
VIN LO
AGND
+5V
VCC
1
-5V
XTAL
27 VEE
14
INT OUT CINT
2
9
10
HI-7159A
12
13
INT IN
3
BUF OUT RINT
4
CREF - GUARD
5
CREF-
6
CREF+
7
CREF
REFERENCE
CAPACITOR
GUARD
RINGS
11 26
8 CREF+ GUARD
DGND
AGND
DGND
FIGURE 8. ANALOG COMPONENTS AND INPUTS
TABLE 14. RECOMMENDED COMPONENT VALUES vs
CLOCK FREQUENCY
fCLOCK
2.4MHz
RINT
400k
CINT
0.01µF
CREF
1.0µF
1.2MHz
360k
0.022µF
2.2µF
600kHz
330k
0.047µF
4.7µF
NOTE: CINT MUST be a high quality polypropylene capacitor or
performance may be degraded.
The reference capacitor and integrating components can
either be selected from Table 14, or calculated from the
following equations.
CREF acts as a voltage source at different times during a
conversion. Its value is determined by two considerations: it
must be small enough to be fully charged from its
discharged state at power-on; yet it also must be large
enough to supply current to the circuit during conversion
without significantly drooping from its initial value. For
2.4MHz operation, a 1µF capacitor is recommended. The
equation for other frequencies is:
CREF = -f-C-----L2---O.--5--C-----K--
The values of RINT and CINT are selected by choosing the
maximum integration current and the maximum integrator
output voltage swing. The maximum integration current and
voltage swing occurs when VIN = full scale = 2 X VREF. The
recommended integration current for the HI-7159A is
5mA - 10mA. This will help determine the value of RINT,
since:
IINT = R--V---I--IN--N--T-- so RINT = I-V-I--N-I--N-T-- ,
where VIN = VIN HI - VIN LO = 2 x VREF.
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