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Intersil Corporation - High Speed/ Monolithic D/A Converter with Reference

Numéro de référence HI-565
Description High Speed/ Monolithic D/A Converter with Reference
Fabricant Intersil Corporation 
Logo Intersil Corporation 





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HI-565 fiche technique
Data Sheet
HI-565A
June 1999 File Number 3109.2
High Speed, Monolithic D/A Converter
with Reference
The HI-565A is a fast, 12-bit, current output, digital-to-analog
converter. The monolithic chip includes a precision voltage
reference, thin-film R2R ladder, reference control amplifier
and twelve high speed bipolar current switches.
The Intersil dielectric isolation process provides latch free
operation while minimizing stray capacitance and leakage
currents, to produce an excellent combination of speed and
accuracy. Also, ground currents are minimized to produce a
low and constant current through the ground terminal, which
reduces error due to code dependent ground currents.
HI-565A dice are laser trimmed for a maximum integral
nonlinearity error of ±0.5 LSB at 25oC. In addition, the low
noise buried zener reference is trimmed both for absolute
value and temperature coefficient. Power dissipation is
typically 250mW, with ±15V supplies.
The HI-565A is offered in both commercial and military
grades. See Ordering Information.
Features
• 12-Bit DAC and Reference on a Single Chip
• Pin Compatible With AD565A
• Very High Speed: Settles to ±0.5 LSB in 250ns (Max)
Full Scale Switching Time 30ns (Typ)
• Guaranteed For Operation With ±12V Supplies
• Monotonicity Guaranteed Over Temperature
• Nonlinearity Guaranteed Over Temp (Max) . . . . ±0.5 LSB
• Low Gain Drift (Max, DAC Plus Ref) . . . . . . . . .25ppm/oC
• Low Power Dissipation . . . . . . . . . . . . . . . . . . . . .250mW
Applications
• CRT Displays
• High Speed A/D Converters
• Signal Reconstruction
• Waveform Synthesis
Ordering Information
PART NUMBER
HI1-565AJD-5
HI1-565AKD-5
HI1-565ASD-2
HI1-565ATD-2
HI1-565ASD/883
HI1-565ATD/883
LINEARITY (INL)
0.50 LSB
0.25 LSB
0.50 LSB
0.25 LSB
0.50 LSB
0.25 LSB
Pinout
HI-565A (SBDIP)
TOP VIEW
LINEARITY (DNL)
0.75 LSB
0.50 LSB
0.75 LSB
0.50 LSB
0.50 LSB
0.50 LSB
NC 1
NC 2
VCC 3
REF OUT (+10V) 4
REF GND 5
REF IN 6
-VEE 7
BIPOLAR R IN 8
IDAC OUT 9
10V SPAN R 10
20V SPAN R 11
POWER GND 12
24 BIT 1 (MSB) IN
23 BIT 2 IN
22 BIT 3 IN
21 BIT 4 IN
20 BIT 5 IN
19 BIT 6 IN
18 BIT 7 IN
17 BIT 8 IN
16 BIT 9 IN
15 BIT 10 IN
14 BIT 11 IN
13 BIT 12 (LSB) IN
TEMP. RANGE (oC)
0 to 75
0 to 75
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
Functional Diagram
PKG. NO.
D24.6
D24.6
D24.6
D24.6
D24.6
D24.6
REF
OUT VCC
43
+
HI-565A
-
REF
IN
6 19.95K
5
IREF 0.5mA
3.5K
+
-
REF
GND
3K
7 12
8
BIP. OFF
5K
9.95K
DAC
IO
(4X IREF
X CODE)
5K
2.5K
24 . . . . . .13
11 20V
SPAN
10 10V
SPAN
9
OUT
-VEE PWR MSB
GND
LSB
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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