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PDF HI-303 Data sheet ( Hoja de datos )

Número de pieza HI-303
Descripción CMOS Analog Switches
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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TM
Data Sheet
HI-301 thru HI-307
March 2000 File Number 3125.4
CMOS Analog Switches
The HI-301 thru HI-307 series of switches are monolithic
devices fabricated using CMOS technology and the Intersil
dielectric isolation process. These switches feature break
before-make switching, low and nearly constant ON
resistance over the full analog signal range, and low power
dissipation, (a few mW for the Hl-301 and HI-303, a few
hundred mW for the HI-307).
The HI-301 and HI-303 are TTL compatible and have a logic
“0” condition with an input less than 0.8V and a logic “1”
condition with an input greater than 4V. The HI-307 switches
are CMOS compatible and have a low state with an input
less than 3.5V and a high state with an input greater than
11V. (See pinouts for switch conditions with a logic “1” input.)
Ordering Information
PART
NUMBER
TEMP.
RANGE (oC)
PACKAGE
HI9P0301-5
HI1-0303-2
HI1-0303-5
HI9P0303-5
HI9P0303-9
HI1-0307-5
0 to 75
-55 to 125
0 to 75
0 to 75
-40 to 85
0 to 75
14 Ld SOIC
14 Ld CERDIP
14 Ld CERDIP
14 Ld SOIC
14 Ld SOIC
14 Ld CERDIP
PKG. NO.
M14.15
F14.3
F14.3
M14.15
M14.15
F14.3
Features
• Analog Signal Range (±15V Supplies) . . . . . . . . . . ±15V
• Low Leakage at 25oC . . . . . . . . . . . . . . . . . . . . . . . 40pA
• Low Leakage at 125oC . . . . . . . . . . . . . . . . . . . . . . . 1nA
• Low On Resistance at 25oC . . . . . . . . . . . . . . . . . . . 35
• Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC
• TTL, CMOS Compatible
• Symmetrical Switch Elements
• Low Operating Power (Typ for Hl-301 and HI-303) . . 1.0mW
Applications
• Sample and Hold (i.e., Low Leakage Switching)
• Op Amp Gain Switching (i.e., Low On Resistance)
• Portable, Battery Operated Circuits
• Low Level Switching Circuits
• Dual or Single Supply Systems
Functional Diagram
IN N
S
P
D
Pinouts Switch States Shown For A Logic “1” Input
SPST HI-301
(SOIC)
TOP VIEW
NC 1
D1 2
NC 3
S1 4
NC 5
IN 6
GND 7
14 V+
13 D2
12 NC
11 S2
10 NC
9 NC
8 V-
DUAL SPDT HI-303 (CERDIP, SOIC)
HI-307 (CERDIP)
TOP VIEW
NC 1
S3 2
D3 3
D1 4
S1 5
IN1 6
GND 7
14 V+
13 S4
12 D4
11 D2
10 S2
9 IN2
8 V-
LOGIC
0
1
SW1
OFF
ON
SW2
ON
OFF
LOGIC
0
1
SW1, SW2 SW3, SW4
OFF
ON
ON OFF
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

1 page




HI-303 pdf
HI-301 thru HI-307
Test Circuits and Waveforms
15V V+
S
VS = +3V
LOGIC
INPUT
GND
SWITCH TYPE
HI-301 and HI-303
HI-307
D
RL
300
V-
-15V
VO SWITCH
OUTPUT
CL
33pF
VINH
4V
15V
LOGIC
INPUT
0V
VS
LOGIC “1” = SWITCH ON
VINH
50%
50%
0V
SWITCH
OUTPUT
90%
tON
tOFF
10%
FIGURE 1A. TEST CIRCUIT
FIGURE 1B. MEASUREMENT POINTS
FIGURE 1. SWITCH tON AND tOFF
RGEN = 0 S
VGEN IN
+15V
V+
D
RL
10k
VLOGIC
V-
GND
-15V
FIGURE 2A. TEST CIRCUIT
CL
10pF
6
HI-301 AND HI-303
4
2
0
LOGIC INPUT
0 0.4 0.8 1.2
TIME (µs)
FIGURE 2B. TTL LOGIC INPUT
1.6
15
HI-307
10
5
0
LOGIC INPUT
0 0.4 0.8 1.2 1.6
TIME (µs)
FIGURE 2C. CMOS LOGIC INPUT
10
5 VGEN = 10V
0
(NOTE 16)
0
0.4 0.8
1.2
TIME (µs)
FIGURE 2D. VANALOG = 10V
1.6
5

5 Page





HI-303 arduino
HI-301 thru HI-307
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1 0.0040 0.0098 0.10 0.25
-
B 0.013 0.020 0.33 0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.3367 0.3444 8.55
8.75
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC 1.27 BSC -
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L 0.016 0.050 0.40 1.27
6
N 14
14 7
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
11

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