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PDF HGTP14N40F3VL Data sheet ( Hoja de datos )

Número de pieza HGTP14N40F3VL
Descripción 330mJ/ 400V/ N-Channel Ignition IGBT
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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January 2002
HGTP14N40F3VL / HGT1S14N40F3VLS
330mJ, 400V, N-Channel Ignition IGBT
General Description
This N-Channel IGBT is a MOS gated, logic level device
which is intended to be used as an ignition coil driver in au-
tomotive ignition circuits. Unique features include an active
voltage clamp between the drain and the gate and ESD pro-
tection for the logic level gate. Some specifications are
unique to this automotive application and are intended to
assure device survival in this harsh environment.
Formerly Developmental Type 49023
Applications
• Automotive Ignition Coil Driver Circuits
• Coil-On Plug Applications
Features
• Logic Level Gate Drive
• Internal Voltage Clamp
• ESD Gate Protection
• Max TJ = 175oC
• SCIS Energy = 330mJ at TJ = 25oC
Package
JEDEC TO-263AB
D² -Pak
G
E
JEDEC TO-220AB
Symbol
EC
G
GATE
COLLECTOR
(FLANGE)
COLLECTOR
(FLANGE)
Device Maximum Ratings TA = 25°C unless otherwise noted
Symbol
BVCES
BVCGR
ESCIS25
IC25
IC90
VGES
VGEM
ICO
ICO
PD
TJ, TSTG
TL
Tpkg
ESD
Parameter
Collector to Emitter Breakdown Voltage (IC = 1 mA)
Collector to Gate Breakdown Voltage (RGE = 10K)
Drain to Source Avalanche Energy at L = 2.3mHy, TC = 25°C
Collector Current Continuous, at TC = 25°C, VGE = 4.5V
Collector Current Continuous, at TC = 90°C, VGE = 4.5V
Gate to Emitter Voltage Continuous
Gate to Emitter Voltage Pulsed
L = 2.3mHy, TC = 25°C
L = 2.3mHy, TC = 150°C
Power Dissipation Total TC = 25°C
Power Dissipation Derating TC > 25°C
Operating and Storage Junction Temperature Range
Max Lead Temp for Soldering (Leads at 1.6mm from Case for 10s)
Max Lead Temp for Soldering (Package Body for 10s)
Electrostatic Discharge Voltage at 100pF, 1500
COLLECTOR
R1
EMITTER
Ratings
420
420
330
38
35
±10
±12
17
12
262
1.75
-40 to 175
300
260
6
Units
V
V
mJ
A
A
V
V
A
A
W
W/°C
°C
°C
°C
KV
©2002 Fairchild Semiconductor Corporation
HGTP14N40F3VL / HGT1S14N40F3VLS Rev. B1, February 2002

1 page




HGTP14N40F3VL pdf
Test Circuit and Waveforms
1500
1250
FREQUENCY = 1 MHz
1000
750
CIES
500
CRES
250 COES
0
0
5 10 15 20 25
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
Figure 13. Capacitance vs Collector to Emitter
Voltage
380
ICER = 10mA
375
370
365
360
8
IG(REF) = 1mA, RL = 1.25Ω, TJ = 25°C
6
VCE = 12V
4
2
VCE = 6V
0
0
5 10 15 20 25 30
QG, GATE CHARGE (nC)
Figure 14. Gate Charge
TJ = 175°C
TJ = - 40°C
TJ = 25°C
355
10
100 1000
RG, SERIES GATE RESISTANCE (k)
Figure 15. Breakdown Voltage vs Series Gate Resistance
5000
10000
100 0.5
0.2
0.1
10-1 0.05
0.02
0.01
10-2
SINGLE PULSE
10-3
10-5
t1
PD
t2
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
10-4
10-3
10-2
10-1
T1, RECTANGULAR PULSE DURATION (s)
Figure 16. Normalized Transient Thermal Impedance
100
©2002 Fairchild Semiconductor Corporation
HGTP14N40F3VL / HGT1S14N40F3VLS Rev. B1, February 2002

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