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PDF ICS90C65 Data sheet ( Hoja de datos )

Número de pieza ICS90C65
Descripción Dual Voltage Video/Memory Clock Generator
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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Integrated
Circuit
Systems, Inc.
ICS90C65
Dual Voltage Video/Memory Clock Generator
Introduction
Features
The Integrated Circuit Systems ICS90C65 is a dual clock Specified for dual voltage operation (VDD=3.3V or 5V),
generator for VGA applications. It simultaneously generates
but operates continuously from 3.0V to 5.25V
two clocks. One clock is for the video memory, and the other Designed to be powered-down for extended battery life
is the video dot clock.
Backward compatibility to the ICS90C64 and ICS90C63
The ICS90C65 has been specifically designed to serve the
portable PC market with operation at either 3.3V or 5V with a
comprehensive power-saving shut-down mode.
Dual Clock generator for the IBM-compatible Western
Digital Imaging Video Graphics Array (VGA) LSI
devices, and 8514/A chip sets
Integral loop filter components, reduce cost and phase
This data sheet supplies sales order information, a functional
jitter
overview, signal pin details, a block diagram, AC/DC charac- Generates fifteen video clock frequencies (including
teristics, timing diagrams, and package mechanical information.
25.175 and 28.322 MHz) derived from a 14.318 MHz
system clock reference frequency
Description
On-chip generation of eight memory clock frequencies
Video clock is selectable among the 15 internally gener-
ated clocks and one external clock
The Integrated Circuit Systems Video Graphics Array Clock
Generator (ICS90C65) is capable of producing different out-
put frequencies under firmware control. The video output
CMOS technology
Available in 20-pin PLCC, SOIC and DIP packages
frequency is derived from a 14.318 MHz system clock avail-
able in IBM PC/XT/AT and Personal System/2 computers. It
is designed to work with Western Digital Imaging Video
Graphics Array and 8514/A devices to optimize video subsys-
tem performance.
The video dot clock output may be one of 15 internally-
generated frequencies or one external input. The selection of
the video dot clock frequency is done through four inputs.
VSEL0
VSEL1
VSEL2
VSEL3
VSEL0 and VSEL1 are latched by the SELEN signal. VSEL2
and VSEL3 are used as direct inputs to the VCLK selection.
Table 1-1 is the truth table for VCLK selection.
The input and truth table have been designed to allow a direct
connection to one of the many Western Digital Imaging VGA
controllers or 8514/A chip sets.
The MCLK output is one of eight internally-generated frequen-
cies as shown in Table 1-2. The various VCLK and MCLK
frequencies are derived from the 14.318 MHz input frequency.
The VCLKE and MCLKE input can tristate the VCLK and
MCLK outputs to facilitate board level testing.
Note:ICS90C65N (DIP) pin-out is identical to ICS90C65M (SOIC) pin-out.
90C65ARevA111095
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ICS90C65 pdf
ICS90C65
Pin Descriptions
The following table provides the pin descriptions for the 20-pin ICS90C65 packages.
PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN
SYMBOL
CLKI
MSEL2
EXTCLK
VSEL1
VSEL0
SELEN
VSEL2
VSEL3
MSEL0
DVSS
MSEL1
MCLK
PWRDN
MCLKE
AVDD
AVSS
NC
VCLKE
VCLK
DVDD
TYPE
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
IN
OUT
IN
IN
-
-
-
IN
OUT
-
DESCRIPTION
Reference input clock from system.
Select input for MCLK selection.
External clock input for an additional frequency.
Control input for VCLK selection.
Control input for VCLK selection.
Strobe for latching VSEL(0,1) (low enable).
Control input for VCLK selection.
Control input for VCLK selection.
Select input for MCLK selection.
Ground for Digital Circuit.
Select input for MCLK selection.
Memory Clock Output.
Power Down Control.
Enable input for MCLK output (high enables output).
Power supply for analog circuit.
Ground for analog circuit.
No connection.
Enable input for VCLK output (high enables output).
Video Clock Output.
Power supply for Digital Circuit.
Note:
CLKI, EXTCLK,VSEL0, VSEL1,VSEL2, VSEL3, SELEN, MSEL0, MSEL1, MSEL2, VCLKE, and MCLKE - input pins have
internal pull-up resistors. PWRDN has an internal pull-down resistor.
5
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