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PDF HFBR-4663 Data sheet ( Hoja de datos )
| Número de pieza | HFBR-4663 | |
| Descripción | Single Chip 10BASE-FL Transceiver | |
| Fabricantes | Agilent(Hewlett-Packard) | |
| Logotipo | .gif "Agilent(Hewlett-Packard)"){kind=logo} |
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Single Chip 10BASE-FL
Transceiver
Technical Data
HFBR-4663
General Description
The HFBR-4663 Single Chip
10BASE-FL Transceiver is a
highly integrated circuit for IEEE
802.3 10Base-FL transceivers.
This product, when used with
HP’s fiber-optic transmitters and
receivers (HFBR-14X4 and
HFBR-2416), ensures
compliance to the 10Base-FL
Standard with a minimum
number of external components
and board space.
The HFBR-4663 offers a standard
IEEE 802.3 AU interface that
allows it to be directly connected
to industry standard manchester
encoder/decoder chips or an AUI
connector. The fiber-optic LED
driver offers a current drive
output that directly drives the
HFBR-14X4 transmitter. The data
quantizer section of the HFBR-
4663 is directly compatible with
the output of the HFBR-24X6
fiber-optic receiver and is capable
of accepting input signals as low
as 2 mVp-p with a 55 dB dynamic
range.
The transmitter automatically
inserts 1 MHz signal during idle
time and removes this signal on
reception. Low light is continu-
ously monitored for both activity
as well as power level. Five LED
status indicators monitor error
conditions as well as transmis-
sions, receptions, and collisions.
Features
• Single Chip Solution for
10BASE-FL Internal or
External Medium
Attachment Units (MAUs)
• Specifically Designed for Use
with HFBR-14X4 and HFBR-
24X6 Fiber-optic
Transmitters and Receivers
• Incorporates an AU Interface
• Highly Stable Data Quantizer
with 55 dB Input Dynamic
Range
• Input Sensitivity as Low
as 2 mVP-P
• Current Driven Fiber Optic
LED Driver for Accurate
Launch Power
• Single +5 Volt Supply
• No Crystal or Clock
Required
• Five Network Status LED
Outputs
• Available in 28 Pin PCC
Package
• Semi-Standard Option
Available
CAUTION: The small junction sizes inherent to the design of this component increase the component's suscepti-
bility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in
handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.
5965-8597E (5/97)
77
1 page  
Operating Conditions
Parameter
Supply Voltage (VCC)
LED on Current
RRSET
RTSET
Min.
4.75
Typ.
5.0
10
61.9 k ± 1%
140 ± 1%
Max.
5.25
Units
V
mA
Ω
Ω
Electrical Characteristics
Unless otherwise specified, TA = 0°C to 70°C, VCC = VCCTx = 5 V ± 5% [2,3]
Parameter
Power Supply Current ICC:
While Transmitting
LED Drivers: VCC
Transmit Peak Output Current[6]
Condition
VCC = 5 V, RTSET = 140 Ω[4]
IOL = 10 mA[5]
RTSET = 140 Ω
Min.
47
Transmit Squelch Voltage Level
(Tx+, Tx-)
Differential Output Voltage
(Rx± , COL± )
-300
± 550
Common Mode Output Voltage
(Rx± , COL± )
Differential Output Voltage
Imbalance (Rx± , COL± )
SQE/JABD
LBDIS Threshold
SQE Test Disable
Both Disabled
Both Enabled
Disabled
Enabled
1.5
VCC - 0.5
VCC - 0.1
Common Mode Voltage (Tx+, Tx-)
Common Mode Voltage (VIN+, VIN-)
Reference Voltage
2.35
VREF Output Source Current
Amplifier Gain
Input Signal Range
2
External Voltage at VTHADJ to
Set VTH
Input Offset
Input Referred Noise
VDC = VREF (DC loop active)
50 MHz BW
0.5
Input Resistance
Input Bias Current of VTHADJ
Input Threshold Voltage
Hysteresis
VIN+, VIN-
VTHADJ = VREF[7]
0.8
-200
5
Typ. Max. Units
220 mA
52
-250
0.8
57
-200
V
mA
mV
± 1200 mV
4.0 V
± 40 mV
3.5
1.65
2.45
100
0.3
VCC - 2
V
V
V
V
1V
V
V
2.55 V
5 mA
V/V
1600 mVP-P
2.7 V
3 mV
25 µV
1.3 2.0 kΩ
10 +200 µA
6 7 mVP-P
20 %
81
5 Page 
The comparator is a high-speed
differential zero crossing detector
that slices and accurately digitizes
the receive signal. The output of
the comparator is fed in parallel
into both the receive squelch
circuit and the loopback MUX.
Link Detect Circuitry and
Low Light
The link detect circuit monitors
the input signal and determines
when the input falls below a
preset voltage level. When the
input falls below a preset voltage,
the HFBR-4663 goes into the Low
Light state. In the Low Light state
the transmitter is disabled, but
continues sending the I MHz idle
signal, the loopback is disabled,
the receiver is disabled and the
LMON LED pin goes to high
shutting off the LMON LED. To
return to the Link Pass state, the
optical receiver power must be
20% higher than the shut-off
state. This built-in hysteresis adds
stability to the Link Monitor
circuit. Once the receiver power
threshold is exceeded, the HFBR-
4663 waits 250 ms to 750 ms,
then checks to see that Tx+, Tx-
is idle and no data is being
received before re-enabling the
transmitter, receiver, loopback
circuit, and lighting up the LMON
LED.
The VTHADJ pin is used to adjust
the sensitivity of the receiver. The
HFBR-4663 is capable of
exceeding the 10BASE-FL
specifications for sensitivity. The
sensitivity is dependent on the
layout of the PC board. A good
low noise layout will exceed the
10BASE-FL specifications, while a
poor layout will fail to meet the
sensitivity and BER spec.
The threshold generator shifts the
reference voltage at VTHADJ
through a circuit which has a
temperature coefficient matching
that of the limiting amplifier. The
relationship between the VTHADJ
and the VTH (the peak to peak
input threshold) is:
VTHADJ = 408 VTH (2)
In a 10BASE-FL receiver, there
must be less than 1 x 10-9 bit
errors at a receive power level of -
32.5 dBm average. One procedure
to determine the sensitivity of a
receiver is to start at the lowest
optical power level and gradually
increase the optical power until
the BER is met. In this case the
Link Detect circuit must not
disable the receiver (i.e. VTHADJ
should be tied to Ground). Once
the sensitivity of the receiver is
determined, VTHADJ can be set just
above the power level that meets
the BER specification. This way
the receiver will shut-off before
the BER is exceeded.
For 10-BASE-FL, VTHADJ can be
tied directly to VREF. However if
greater sensitivity is required the
circuit in Figure 5 can be used to
adjust the VTHADJ voltage. Even if
VREF is tied to VTHADJ, it is a good
idea to layout a board with these
two resistors available. This will
allow potential future adjustments
without board revisions.
The response time of the Link
Detect circuit is set by the CTIMER
pin. Starting from the link off
state the link can be switched on
if the input exceeds the set
threshold for a time given by:
CTIMER x 0.7 V
T= ––––––––––––
700 µA
VREF
R1
VTHADJ
R2
REF
THRESH
GEN
Figure 5.
To switch the link from on to off,
the above time will be doubled. A
value of 0.05 µF will meet the
10BASE-FL specifications.
Differences between
10BASE-FL and FOIRL
10BASE-FL is an improved
version of the original FOIRL
standard. The 10BASE-FL
standard allows backward
compatibility of a 10BASE-FL
transceiver with a FOIRL
transceiver. The main improve-
ments incorporated into 10BASE-
FL are that it can attach to a DTE
by adding the SQE test, and the
distance has been increased from
1 km to 2 km. The other
differences are much more subtle.
87
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HFBR-4663.PDF ] | |
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