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PDF HFBR-2119T Data sheet ( Hoja de datos )

Número de pieza HFBR-2119T
Descripción Fiber Optic Transmitter and Receiver Data Links for 266 MBd
Fabricantes Agilent(Hewlett-Packard) 
Logotipo Agilent(Hewlett-Packard) Logotipo



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Fiber Optic Transmitter
and Receiver Data Links
for 266 MBd
Technical Data
HFBR-1119T Transmitter
HFBR-2119T Receiver
Features
• Full Compliance with the
Optical Performance
Requirements of the Fibre
Channel Physical Layer
• Other Versions Available for:
- FDDI
- ATM
• Compact 16-pin DIP Package
with Plastic ST* Connector
• Wave Solder and Aqueous
Wash Process Compatible
Package
• Manufactured in an ISO
9001 Certified Facility
Applications
• Fibre Channel Interfaces
• Multimode Fiber Optic Links
up to 266 MBd at 1500 m
• General Purpose, Point-to-
Point Data Communications
• Replaces DLT/R1040-ST2
Model Transmitters and
Receivers
Description
The HFBR-1119/-2119 series of
data links are high-performance,
cost-efficient, transmitter and
receiver modules for serial
optical data communication
applications specified at 266 MBd
for Fibre Channel applications or
for general-purpose fiber optic
data link transmission.
These modules are designed for
50 or 62.5 µm core multimode
optical fiber and operate at a
nominal wavelength of 1300 nm.
They incorporate our high-
performance, reliable, long-
wavelength, optical devices and
proven circuit technology to give
long life and consistent
performance.
Transmitter
The transmitter utilizes a 1300 nm
surface-emitting InGaAsP LED,
packaged in an optical subassem-
bly. The LED is dc-coupled to a
custom IC which converts
differential-input, PECL logic
signals, ECL-referenced (shifted)
to a +5 V power supply, into an
analog LED drive current.
Receiver
The receiver utilizes an InGaAs
PIN photodiode coupled to a
custom silicon transimpedance
preamplifier IC. The PIN-
preamplifier combination is ac-
coupled to a custom quantizer IC
which provides the final pulse
shaping for the logic output and
the Signal Detect function. Both
the Data and Signal Detect
Outputs are differential. Also,
both Data and Signal Detect
Outputs are PECL compatible,
ECL-referenced (shifted) to a
+5 V power supply.
Package
The overall package concept for
the Data Links consists of the
following basic elements: two
optical subassemblies, two
electrical subassemblies, and the
outer housings as illustrated in
Figure 1.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
200
5965-3483E (8/96)

1 page




HFBR-2119T pdf
+5 Vdc
GND
DATA
DATA
Tx
*
A
L2
1
C2
0.1
R3 R2 R4 R1
82 82 130 130
9 NC
10 GND
11 VCC
12 VCC
13 GND
14 D
15 D
16 NC
NC 8
NO
PIN
7
GND 6
GND 5
GND 4
GND 3
VBB 2
NC 1
*
C5
0.1
TERMINATE D, D
AT Tx INPUTS
Rx
* 9 NC
NC 8 *
10
NO
PIN
11 GND
GND 7
VCC 6
L1
1
12 GND
13 GND
VCC 5
VCC 4
C1 C7
C3 C4
0.1 10
0.1 10
(OPTIONAL)
14 SD
D3
15 SD
16
NO
PIN
D2
NC 1
R7 R5 R8 R6
82 82 130 130
C6
0.1 R9
82
R11
82
TOP VIEWS
R10 R12
130 130
SD
A
DATA
DATA
SD
TERMINATE D, D, SD, SD AT
INPUTS OF FOLLOW-ON DEVICES
NOTES:
1. RESISTANCE IS IN OHMS. CAPACITANCE IS IN MICROFARADS. INDUCTANCE IS IN MICROHENRIES.
2. TERMINATE TRANSMITTER INPUT DATA AND DATA-BAR AT THE TRANSMITTER INPUT PINS. TERMINATE THE RECEIVER OUTPUT DATA, DATA-BAR, AND SIGNAL DETECT-
BAR AT THE FOLLOW-ON DEVICE INPUT PINS. FOR LOWER POWER DISSIPATION IN THE SIGNAL DETECT TERMINATION CIRCUITRY WITH SMALL COMPROMISE TO THE
SIGNAL QUALITY, EACH SIGNAL DETECT OUTPUT CAN BE LOADED WITH 510 OHMS TO GROUND INSTEAD OF THE TWO RESISTOR, SPLIT-LOAD PECL TERMINATION
SHOWN IN THIS SCHEMATIC.
3. MAKE DIFFERENTIAL SIGNAL PATHS SHORT AND OF SAME LENGTH WITH EQUAL TERMINATION IMPEDANCE.
4. SIGNAL TRACES SHOULD BE 50 OHMS MICROSTRIP OR STRIPLINE TRANSMISSION LINES. USE MULTILAYER, GROUND-PLANE PRINTED CIRCUIT BOARD FOR BEST HIGH-
FREQUENCY PERFORMANCE.
5. USE HIGH-FREQUENCY, MONOLITHIC CERAMIC BYPASS CAPACITORS AND LOW SERIES DC RESISTANCE INDUCTORS. RECOMMEND USE OF SURFACE-MOUNT COIL
INDUCTORS AND CAPACITORS. IN LOW NOISE POWER SUPPLY SYSTEMS, FERRITE BEAD INDUCTORS CAN BE SUBSTITUTED FOR COIL INDUCTORS. LOCATE POWER
SUPPLY FILTER COMPONENTS CLOSE TO THEIR RESPECTIVE POWER SUPPLY PINS. C7 IS AN OPTIONAL BYPASS CAPACITOR FOR IMPROVED, LOW-FREQUENCY NOISE
POWER SUPPLY FILTER PERFORMANCE.
6. DEVICE GROUND PINS SHOULD BE DIRECTLY AND INDIVIDUALLY CONNECTED TO GROUND.
7. CAUTION: DO NOT DIRECTLY CONNECT THE FIBER-OPTIC MODULE PECL OUTPUTS (DATA, DATA-BAR, SIGNAL DETECT, SIGNAL DETECT-BAR, VBB) TO GROUND WITHOUT
PROPER CURRENT LIMITING IMPEDANCE.
8. (*) OPTIONAL METAL ST OPTICAL PORT TRANSMITTER AND RECEIVER MODULES WILL HAVE PINS 8 AND 9 ELECTRICALLY CONNECTED TO THE METAL PORT ONLY AND
NOT CONNECTED TO THE INTERNAL SIGNAL GROUND.
Figure 6. Recommended Interface Circuitry and Power Supply Filter Circuits.
204

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HFBR-2119T arduino
Notes:
1. This is the maximum voltage that can
be applied across the Differential
Transmitter Data Inputs to prevent
damage to the input ESD protection
circuit.
2. When component testing these
products, do not short the receiver
Data or Signal Detect outputs directly
to ground to avoid damage to the
part.
3. The outputs are terminated with 50
connected to VCC - 2 V.
4. The power supply current needed to
operate the transmitter is provided to
differential ECL circuitry. This
circuitry maintains a nearly constant
current flow from the power supply.
Constant current operation helps to
prevent unwanted electrical noise
from being generated and conducted
or emitted to neighboring circuitry.
5. These optical power values are
measured as follows:
• The Beginning of Life (BOL) to the
End of Life (EOL) optical power
degradation is typically 1.5 dB per
the industry convention for long
wavelength LEDs. The actual
degradation observed in Hewlett-
Packard’s 1300 nm LED products is
< 1dB, as specified in this data
sheet.
• Over the specified operating
voltage and temperature ranges.
• With 25 MBd (12.5 MHz square-
wave), input signal.
• At the end of one meter of noted
optical fiber with cladding modes
removed.
The average power value can be
converted to a peak power value by
adding 3 dB. Higher output optical
power transmitters are available on
special request.
6. The Extinction Ratio is a measure of
the modulation depth of the optical
signal. The data “0” output optical
power is compared to the data “1”
peak output optical power and
expressed as a percentage. With the
transmitter driven by a 12.5 MHz
square-wave signal, the average
optical power is measured. The data
“1” peak power is then calculated by
adding 3 dB to the measured average
optical power. The data “0” output
optical power is found by measuring
the optical power when the transmit-
ter is driven by a logic “0” input. The
extinction ratio is the ratio of the
optical power at the “0” level
compared to the optical power at the
“1” level expressed as a percentage or
in decibels.
7. This parameter complies with the
requirements for the tradeoffs
between center wave length, spectral
width, and rise/fall times shown in
Figure 8.
8. The optical rise and fall times are
measured from 10% to 90% when the
transmitter is driven by a 25 MBd
(12.5 MHz square-wave) input signal.
This parameter complies with the
requirements for the tradeoffs
between center wavelength, spectral
width, and rise/fall times shown in
Figure 8.
9. Deterministic Jitter is defined as the
combination of Duty Cycle Distortion
and Data Dependent Jitter. Deter-
ministic Jitter is measured with a test
pattern consisting of repeating K28.5
(00111110101100000101) data
bytes and evaluated per the method in
FC-PH Annex A.4.3.
10. Random Jitter is specified with a
sequence of K28.7 (square wave of
alternating 5 ones and 5 zeros) data
bytes and, for the receiver, evaluated
at a Bit-Error-Ratio (BER) of 1 x 10-12
per the method in FC-PH Annex
A.4.4.
11. This specification is intended to
indicate the performance of the
receiver when Input Optical Power
signal characteristics are present per
the following definitions. The Input
Optical Power dynamic range from
the minimum level (with a window
time-width) to the maximum level is
the range over which the receiver is
guaranteed to provide output data
with a Bit-Error-Ratio (BER) better
than or equal to 1 x 10-12.
• At the Beginning of Life (BOL).
• Over the specified operation
temperature and voltage ranges.
• Input symbol pattern is a 266 MBd,
27 - 1 pseudo-random bit stream
data pattern.
• Receiver data window time-width is
± 0.94 ns or greater and centered
at mid-symbol. This data window
time width is calculated to simulate
the effect of worst-case input jitter
per FC-PH Annex J and clock
recovery sampling position in order
to insure good operation with the
various FC-0 receiver circuits.
• The maximum total jitter added by
the receiver and the maximum total
jitter presented to the clock
recovery circuit comply with the
maximum limits listed in Annex J,
but the allocations of the Rx added
jitter between deterministic jitter
and random jitter are different than
in Annex J.
12. All conditions of Note 11 apply
except that the measurement is made
at the center of the symbol with no
window time-width.
13. This value is measured during the
transition from low to high levels of
input optical power.
14. This value is measured during the
transition from high to low levels of
input optical power.
15. These values are measured with the
outputs terminated into 50 con-
nected to VCC - 2 V and an input
optical power level of -14 dBm
average.
16. The power dissipation value is the
power dissipated in the transmitter or
the receiver itself. Power dissipation
is calculated as the sum of the
products of supply voltage and supply
current, minus the sum of the
products of the output voltages and
currents.
17. These values are measured with
respect to VCC with the output
terminated into 50 connected to
VCC - 2 V.
18. The output rise and fall times are
measured between 20% and 80%
levels with the output connected to
VCC - 2 V through 50 .
19. The Signal Detect output shall be
asserted, logic-high (VOH), within
100 µs after a step increase of the
Input Optical Power.
20. Signal Detect output shall be de-
asserted, logic-low (VOL), within
350 µs after a step decrease in the
Input Optical Power.
21. This value is measured with an output
load RL = 10 k.
210

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