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PDF HFA3624IA Data sheet ( Hoja de datos )

Número de pieza HFA3624IA
Descripción 2.4GHz Up/Down Converter
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
HFA3624
November 1998 File Number 4066.8
2.4GHz Up/Down Converter
The Intersil 2.4GHz PRISM™ chip set
is a highly integrated five-chip solution
for RF modems employing Direct
Sequence Spread Spectrum (DSSS)
signaling. The HFA3624 RF/IF
converter is one of the five chips in the PRISM™ chip set
(see Figure 1 for the typical application circuit).
The HFA3624 Up/Down converter is a monolithic bipolar
device for up/down conversion applications in the 2.4GHz to
2.5GHz range. Manufactured in the Intersil UHF1X process,
the device consists of a low noise amplifier and down
conversion mixer in the receive section and an up conversion
mixer with power preamp in the transmit section. An energy
saving power enable control feature assures isolation
between the receive and transmit circuits for time division
multiplexed systems. The device requires low drive levels from
the local oscillator and is housed in a small outline 28 lead
SSOP package ideally suited for PCMCIA card applications.
Ordering Information
PART NUMBER
HFA3624IA
HFA3624IA96
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 28 Ld SSOP
-40 to 85 Tape and Reel
PKG.
NO.
M28.15
Pinout
HFA3624
(SSOP)
TOP VIEW
LNA_RX_VCC2 1
GND 2
LNA_RX_OUT 3
GND 4
LNA_RX_VCC1 5
GND 6
LNA_RX_IN 7
PRE_TX_OUT 8
GND 9
PRE_TX_VCC2 10
GND 11
PRE_TX_IN 12
GND 13
PRE_TX_VCC1 14
28 RX_PE
27 RX_VCC
26 RXM_RF
25 GND
24 RXM_IF+
23 RXM_IF-
22 LO_BY
21 LO_IN
20 TXM_IF-
19 TXM_IF+
18 GND
17 TXM_RF
16 TX_VCC
15 TX_PE
Features
• Complete Receive/Transmit Front End
• RF Frequency Range . . . . . . . . . . . . . . 2.4GHz to 2.5GHz
• IF Operation . . . . . . . . . . . . . . . . . . . . . 10MHz to 400MHz
• Single Supply Battery Operation . . . . . . . . . 2.7V to 5.5V
• Independent Receive/Transmit Power Enable Mode
Applications
• Systems Targeting IEEE 802.11 Standard
• PCMCIA Wireless Transceiver
• Wireless Local Area Network Modems
• TDMA Packet Protocol Radios
• Part 15 Compliant Radio Links
• Portable Battery Powered Equipment
Block Diagram
LNA_RX_OUT
LNA_RX_IN
PRE_TX_OUT
PRE_TX_IN
RX BIAS
LNA
RXM
PRE
TXM
TX BIAS
LOB
RX_PE
RXM_RF
RXM_IF+
RXM_IF-
LO_BY
LO_IN
TXM_IF-
TXM_IF+
TXM_RF
TX_PE
2-27
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
PRISM® is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.

1 page




HFA3624IA pdf
HFA3624
Electrical Specifications VCC = +2.7V, LO = 2170MHz, IF = 280MHz, RF = 2450MHz, ZO = 50,
Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEMP (oC)
MIN
TYP
MAX
UNITS
TRANSMIT MIXER/POWER PRE-AMP CASCADED CHARACTERISTICS (TXM_IF+ = 280MHz/-13dBm, -3dB Loss RF Image Filter with no LO
suppression between Mixer and Transmit Amp, RL = 50, RSIF =
250(Note 6))
Cascaded Power Gain
CTX_PG
25
8 11.4 -
dB
85 5.5 -
- dB
Cascaded Output P1dB
CTX_P1D
25
- -2.0 - dBm
Cascaded Output NF
CTX_NF
25
- 15 -
dB
Cascaded Output 3rd Order Intercept
CTX_IP3
25
- 7.1 - dBm
Cascaded LO Leakage
CTX_LEAK
25
- -8.7 - dBm
POWER SUPPLY AND LOGIC CHARACTERISTICS
Voltage Supply Range
Transmit Mode Supply Current (VCC = 2.7V)
VCC
TX_2.7ICC
25
25
85
2.7 - 5.5 V
32 49 57 mA
43 - 64 mA
Receive Mode Supply Current (VCC = 2.7V)
RX_ICC 25 10 18 20.5 mA
85
19 22.5 24
mA
Power Down Current (VCC = 5.5V)
Logic Input Low Level
Logic Input High Level
Logic Low Input Bias Current (VPE = 0V, VCC = 5.5V)
Logic High Input Bias Current (VPE = 5.5V, VCC = 5.5V)
TX/RX Power Enable Time (Note 7)
ICC_PD
VIL
VIH
IB_LO
IB_HI
PEt
Full - 0.3 10 µA
Full -0.2 - 0.8 V
Full 2.0 - VCC V
Full - - 1 µA
Full - - 150 µA
Full
- 0.25 1
µs
TX/RX Power Disable Time (Note 7)
PDt
Full
- 0.25 1
µs
NOTES:
2. See Figure 5 Test Circuit for 50IF matching network component values.
3. SSB (Single Side Band) Noise Figure measurement requires the use of an IF Reject/Highpass Filter between the Noise Source and the RXM_RF
port. This filter prevents IF input noise from interfering with the Mixer IF output Noise Figure Measurement.
4. Transmit mixer measured with Impedance Transform Network 250at device to 50at the source. Refer to Figure 5, pin 19.
5. Implied limit, production measurement uses 50termination at pin 19 (RSIF = 50). Typical transmit conversion gain increase of 5.5dB with
application circuit Figure 5 (RSIF = 250).
6. See Figure 2 for Typical Application Circuit.
7. Enable/Disable Time Specifications are tested with the external component values shown in the Figure 5 Test Circuit, with an IF frequency of
280MHz. Specifically the AC coupling capacitors on the TXM_IF+ and TXM_IF- pins are biased up to operating voltage from a fixed internal
current source at power up. Increasing these AC coupling capacitors above 1000pF will slow Enable Time proportionately.
POWER CONTROL TRUTH TABLE
STATE
RX_PE
Power Down
(Receive/Transmit Channels Power Down)
Low
Transmit Mode
(Receive Channel Power Down)
Low
Receive Mode
(Transmit Channel Power Down)
High
Not Recommended
High
TX_PE
Low
High
Low
High
2-31

5 Page





HFA3624IA arduino
HFA3624
Typical Performance Curves (Continued)
VCC = 2.7V
TA = 25oC
10
0
-10
-20
DUT + FIXTURE
DUT
30
VCC = 2.7V
TA = 25oC
20
10
0
DUT
DUT + FIXTURE
1.0 2.0 3.0
FREQUENCY (GHz)
FIGURE 8. PRE-AMPLIFIER S11 LOG MAG INPUT RETURN
LOSS
1.0 2.0 3.0
FREQUENCY (GHz)
FIGURE 9. PRE-AMPLIFIER S21 LOG MAG FORWARD GAIN
VCC = 2.7V
TA = 25oC
-20
DUT
-30
DUT + FIXTURE
-40
-50
1.0 2.0
FREQUENCY (GHz)
FIGURE 10. PRE-AMPLIFIER S12 LOG MAG REVERSE
ISOLATION
3.0
VCC = 2.7V
TA = 25oC
0
-10
-20
DUT
-30
DUT + FIXTURE
1.0 2.0 3.0
FREQUENCY (GHz)
FIGURE 11. PRE-AMPLIFIER S22 LOG MAG OUTPUT RETURN
LOSS
VCC = 2.7V
TA = 25oC
10
0
-10
-20
DUT
DUT + FIXTURE
1.0 2.0 3.0
FREQUENCY (GHz)
FIGURE 12. LNA S11 LOG MAG INPUT RETURN LOSS
30
VCC = 2.7V
TA = 25oC
20
DUT
10
DUT + FIXTURE
0
-10
1.0 2.0 3.0
FREQUENCY (GHz)
FIGURE 13. LNA S21 LOG MAG FORWARD GAIN
2-37

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