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PDF HIP6004A Data sheet ( Hoja de datos )

Número de pieza HIP6004A
Descripción Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
Fabricantes Intersil Corporation 
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Data Sheet
HIP6004A
October 1997 File Number 4417.1
Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor
The HIP6004A provides complete control and protection for
a DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous-rectified buck
topology. The HIP6004A integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.
The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6004A includes a fully TTL-
compatible 5-input digital-to-analog converter (DAC) that
adjusts the output voltage from 2.1VDC to 3.5VDC in 0.1V
increments and from 1.8VDC to 2.05VDC in 0.05V steps.
The precision reference and voltage-mode regulator hold the
selected output voltage to within ±1% over temperature and
line voltage variations.
The HIP6004A provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/ms slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The HIP6004A monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within ±10%. The HIP6004A
protects against over-current and over-voltage conditions by
inhibiting PWM operation. Additional built-in over-voltage
protection triggers an external SCR to crowbar the input
supply. The HIP6004A monitors the current by using the
rDS(ON) of the upper MOSFET which eliminates the need for
a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HIP6004ACB
0 to 70 20 Ld SOIC
PKG.
NO.
M20.3
6X86™ is a trademark of Cyrix Corporation.
Alpha Micro™ is a trademark of Digital Computer Equipment Corporation.
K6™ is a trademark of Advanced Micro Devices, Inc.
Pentium® is a registered trademark of Intel Corporation.
PowerPC™ is a trademark of IBM.
Features
• Drives Two N-Channel MOSFETs
• Operates from +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- ±1% Over Line Voltage and Temperature
• TTL-Compatible 5-Bit Digital-to-Analog Output Voltage
Selection
- Wide Range . . . . . . . . . . . . . . . . . . . 1.8VDC to 3.5VDC
- 0.1V Binary Steps . . . . . . . . . . . . . . . 2.1VDC to 3.5VDC
- 0.05V Binary Steps . . . . . . . . . . . . . 1.8VDC to 2.05VDC
• Power-Good Output Voltage Monitor
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element,
Uses MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to over 1MHz
Applications
• Power Supply for Pentium®, Pentium Pro, Pentium II,
PowerPC™, K6™, 6X86™ and Alpha™ Microprocessors
High-Power 5V to 3.xV DC-DC Regulators
Low-Voltage Distributed Power Supplies
Pinout
HIP6004A
(SOIC)
TOP VIEW
VSEN 1
OCSET 2
SS 3
VID0 4
VID1 5
VID2 6
VID3 7
VID4 8
COMP 9
FB 10
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
2-62
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




HIP6004A pdf
HIP6004A
Functional Pin Description
VSEN 1
OCSET 2
SS 3
VID0 4
VID1 5
VID2 6
VID3 7
VID4 8
COMP 9
FB 10
20 RT
19 OVP
18 VCC
17 LGATE
16 PGND
15 BOOT
14 UGATE
13 PHASE
12 PGOOD
11 GND
VSEN (Pin 1)
This pin is connected to the converters output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.
OCSET (Pin 2)
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET. ROCSET, an internal 200µA current source
(IOCS), and the upper MOSFET on-resistance (rDS(ON)) set
the converter over-current (OC) trip point according to the
following equation:
IPEAK
=
I--O-----C----S---------R-----O-----C----S----E----T-
rDS(ON)
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10µA current source, sets the soft-
start interval of the converter.
VID0-4 (Pins 4-8)
VID0-4 are the input pins to the 5-bit DAC. The states of
these five pins program the internal voltage reference
(DACOUT). The level of DACOUT sets the converter output
voltage. It also sets the PGOOD and OVP thresholds. Table
1 specifies DACOUT for the 32 combinations of DAC inputs.
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
GND (Pin 11)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within ±10% of the
DACOUT reference voltage.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND (Pin 16)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 17)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
VCC (Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
RT (Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (RT) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs 200kHz + R--5---T----(--1k---0----6--)
(RT to GND)
Conversely, connecting a pull-up resistor (RT) from this pin
to VCC reduces the switching frequency according to the
following equation:
Fs 200kHz – -R-4---T----(--1k---0----7--)
(RT to 12V)
2-66

5 Page





HIP6004A arduino
HIP6004A
Schottky Selection
Rectifier D2 is a clamp that catches the negative inductor
swing during the dead time between turning off the lower
MOSFET and turning on the upper MOSFET. The diode
must be a Schottky type to prevent the lossy parasitic
MOSFET body diode from conducting. It is acceptable to
omit the diode and let the body diode of the lower MOSFET
clamp the negative inductor swing, but efficiency will drop
one or two percent as a result. The diode's rated reverse
breakdown voltage must be greater than the maximum
input voltage.
+12V
VCC
HIP6004A
BOOT
UGATE
PHASE
- LGATE
+
PGND
GND
+5V OR LESS
Q1
NOTE:
VG-S VCC -5V
Q2 D2
NOTE:
VG-S VCC
FIGURE 10. UPPER GATE DRIVE - DIRECT VCC DRIVE OPTION
2-72

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