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PDF HIP1020 Data sheet ( Hoja de datos )
| Número de pieza | HIP1020 | |
| Descripción | nullSingle/ Double or Triple-Output Hot Plug Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HIP1020
August 1999
File Number 4601.1
Single, Double or Triple-Output Hot Plug
Controller
The HIP1020 applies a linear voltage ramp to the gates of
any combination of 3.3V, 5V, and 12V MOSFETs. The
internal charge pump doubles a 12V bias or triples a 5V bias
to deliver the high-side drive capability required when using
more cost-effective N-Channel MOSFETs. The 5V/ms ramp
rate is controlled internally and is the proper value to turn on
most devices within the Device-Bay-specified di/dt limit. If a
slower rate is required, the internally-determined ramp rate
can be over ridden using an optional external capacitor.
When VCC = 12V, the charge pump ramps the voltage on
HGATE from zero to 22V in about 4ms. This allows either a
standard or a logic-level MOSFET to become fully enhanced
when used as a high-side switch for 12V power control. The
voltage on LGATE ramps from zero to 16V allowing the
simultaneous control of 3.3V and/or 5V MOSFETs.
When VCC = 5V, the charge pump enters voltage-tripler
mode. The voltage on HGATE ramps from zero to 12.5V in
about 3ms while LGATE ramps to 12.0V. This mode is ideal
for control of high-side MOSFET switches used in 3.3V and
5V power switching when 12V bias is not available.
Ordering Information
PART
NUMBER
HIP1020CK-T
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
0 to 70
5 Ld SOT23 Tape P5.064
and Reel
Features
• Rise Time Controlled to Device-Bay Specifications
• No Additional Components Required
• Internal Charge Pump Drives N-Channel MOSFETs
• Drives any Combination of One, Two or Three Outputs
• Internally-Controlled Turn-On Ramp
- Optional Capacitor Selects Slower Rates
• Prevents False Turn on During Hot Insertion
• Operates using 12V or 5V Bias
• Improves Device Bay Peripheral Size Cost and Complexity
- Minimal Component Count
- Tiny 5-Pin SOT23 Package
• Controls Standard and Logic-Level MOSFETs
• Compatible with TTL and 3.3V Logic Devices
• Shutdown Current . . . . . . . . . . . . . . . . . . . . . . . . . . < 1µA
• Operating Current. . . . . . . . . . . . . . . . . . . . . . . . . . < 3mA
Applications
• Device Bay Peripherals
• Hot Plug Control
• Power Distribution Control
Pinout
HIP1020 (SOT23)
TOP VIEW
VCC 1
GND 2
LGATE 3
5 EN
4 HGATE
Typical Applications
HIP1020
1 CHARGE
PUMP
2
ENABLE
5 OPTIONAL
C1
34
V12 V12,OUT
V5 V5,OUT
V33 V33,OUT
FIGURE 1A. DEVICE-BAY HOT PLUG CONTROLLER WITH
VCC = 12V
HIP1020
ENABLE
1 CHARGE
PUMP
2
5 OPTIONAL
C1
34
V5 V5,OUT
V33 V33,OUT
FIGURE 1B. DEVICE-BAY HOT PLUG CONTROLLER WITH
VCC = 5V
2-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1 page  
HIP1020
TABLE 1. DEVICE-BAY MOSFET SELECTION GUIDE FOR PERIPHERAL-POWER CONTROL
INTERSIL
PART NO.
MOUNTING-PAD
AREA (IN2)
PACKAGE
rDS(ON)
BUS
MAXIMUM
(mΩ) (VOLTAGE) AVERAGE CURRENT
MAXIMUM
PEAK CURRENT
HUF76105DK8
0.05
SO-8
Dual
63
12
≤3A (Note 4)
≤7A (Note 5)
51 5
≤1A
≤2A
48 3.3
≤1A
≤1.25A
HUF76113DK8
0.05
SO-8
Dual
43
12
≤3A (Note 4)
≤11A (Note 5)
or
40 5
≤2A
≤2.5A
HUF76113T3ST
0.08
SOT223 Single
37
3.3
≤1.5A
≤1.5A
HUF76131SK8
0.05
SO-8 Single
17
12
≤6A (Note 4)
≤25A (Note 5)
16 5
≤5A (Note 4)
≤6A (Note 5)
15 3.3
≤4A
≤4A
HUF76143S3S
0.31
TO-263 Single
7
3.3
≤9A (Note 4)
≤9A (Note 5)
NOTES:
4. Maximum-Average-Current level meets or exceeds the Device-Bay specified level for a 30s “peak”.
5. Maximum-Peak-Current level meets or exceeds the Device-Bay specified level for a 100µs “transient”.
The MOSFETs in Table 1 were selected based on the
assumption that at most 2% the of the 5V or 3.3V-bus
voltage could appear across the 5V or 3.3V MOSFET, and
that at most 4% of the 12V-bus voltage could appear across
the 12V MOSFET. The worst-case voltage drop occurs
during a 100µs current transient given in the Maximum-
Peak-Current column. Longer transients may not be
tolerable by the MOSFET depending on its junction
temperature prior to the transient.
In most cases, the given Mounting-Pad Area is required to
achieve the Maximum-Average-Current rating. It assumes 1-
oz. copper, zero air flow, and an ambient temperature not
exceeding 50oC. The Mounting-Pad Area is the approximate
area of a rectangle encompassing the MOSFET package
and its leads. The rDS(ON) numbers assume the device has
reached thermal equillibrium at the Maximum-Average-
Current. In some cases, the thermal capabilities as well as
rDS(ON) can be improved by using larger pads, heavier
copper, air flow, or lower ambient temperature.
Protection from Unwanted Turn On
A dv/dt-activated clamp circuit is internally connected to
LGATE (pin 4), and is active when the chip is not powered. It
is activated when the voltage on either LGATE or HGATE
rises too quickly, and it immediately provides a low-
impedance ground path for current from either gate pin.
The purpose of the dv/dt-activated clamp circuit is to prevent
unwanted turn on of the power MOSFETs during a hot
insertion event. When a Device-Bay peripheral is inserted
into the bay, the power pins on the peripheral are brought
into contact with the already-energized mating contacts in
the bay. This results in a very fast-rising voltage edge on the
drains of the power MOSFETs which can inject current
through the gate-to-drain capacitance and briefly turn on the
power MOSFET. The result is a momentary dip in the rail
voltage which can effect the device’s operation as well as the
operation of any other device already connected and
potentially the host system itself. Without the dv/dt-activated
clamp, a decoupling capacitor would be needed between
each power MOSFET drain and ground using up valuable
board space and adding unnecessary cost. The HIP1020
solves this problem by providing a path for capacitively-
coupled current to reach ground.
Increasing the Rise Time
The HIP1020 has an internal-ramping charge pump that
increases the voltage to the power MOSFETs in a
predictable controlled manner allowing soft turn on of most
types of loads. It is possible that some types of load would
require slower turn on. This could arise when a load has a
large capacitive component or for some other reason
requires an extraordinarily high starting current. Without the
external capacitor, C1 (see Figure 1), the ramp rate is about
5V/ms. A capacitor between HGATE and ground will slow
the rise time of both gate voltages to a rate given by
C1 = I--H-----G----A----T----E--
d-d---v-t-
(EQ.1)
In Equation 1, C1 is the value of capacitor in Farads required
to achieve a rise rate of dv/dt in V/s, and IHGATE is current
output of pin 4 given in Amperes as shown in the “Electrical
Specifications” section of this data sheet. Figures 2 through
5 show gate voltage waveforms for selected values of C1.
2-5
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