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PDF HIP0061AS2 Data sheet ( Hoja de datos )
| Número de pieza | HIP0061AS2 | |
| Descripción | 60V/ 3.5A/ 3-Transistor Common Source ESD Protected Power MOSFET Array | |
| Fabricantes | Intersil Corporation | |
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HIP0061
December 1997
60V, 3.5A, 3-Transistor Common Source
ESD Protected Power MOSFET Array
Features
Description
• Three 3.5A Power MOS N-Channel Transistors
• Output Voltage to 60V
• rDS(ON) . . . . . 0.225Ω Max Per Transistor at VGS = 10V
• Pulsed Current . . . . . . . . . . . . . . . . 10A Each Transistor
• Avalanche Energy . . . . . . . . . . 100mJ Each Transistor
• Grounded Tab Eliminates Heat Sink Isolation
Applications
The HIP0061 is a power MOSFET array that consists of
three matched N-Channel enhancement mode MOS transis-
tors connected in a common source configuration. The
advanced Harris PASIC2 process technology used in this
product utilizes efficient geometries that provides outstand-
ing device performance and ruggedness.
The HIP0061 is designed to integrate three power devices in
one chip thus providing board layout area and heat sink sav-
ings for applications such as Motor Controls, Lamps,
Solenoids and Resistive Loads.
• Automotive
• Appliance
• Industrial Control
• Robotics
• Relay, Solenoid, Lamp Drivers
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HIP0061AS1
-40 to 125 7 Ld Staggered
Vertical SIP
PKG.
NO.
Z7.05C
Symbol
DRAIN1
2
DRAIN2
5
DRAIN3
7
GATE1
1
GATE2
3
GATE3
6
4
SOURCE, TAB
HIP0061AS2
-40 to 125 7 Ld Gullwing SIP Z7.05B
Pinouts
HIP0061AS1
(SIP - VERTICAL)
TOP VIEW
7 DRAIN3
6 GATE3
5 DRAIN2
4 SOURCE
3 GATE2
2 DRAIN1
1 GATE 1
TAB
TAB (SOURCE) INTERNALLY CONNECTED TO PIN 4
HIP0061AS2
(SIP - GULLWING)
TOP VIEW
7 DRAIN3
6 GATE3
5 DRAIN2
4 SOURCE
3 GATE2
2 DRAIN1
1 GATE 1
TAB
TAB (SOURCE) INTERNALLY CONNECTED TO PIN 4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 3982.3
1 page  
HIP0061
Typical Performance Curves (Continued)
750 5
VGS = 0V, f = 1MHz, TC = 25oC
600 4
450
3
VGS = 10V
CISS
VGS = 5V
300
COSS
2
CRSS
150 1
0
05
10 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 9. TYPICAL CAPACITANCE vs VOLTAGE
0
25 25
50 75 100 125
TC, CASE TEMPERATURE (oC)
150
FIGURE 10. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
10
TC = 25oC
1
0.1
10-6
D = 1.0
0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (s)
NOTES:
1. DUTY FACTOR, D = t1/t2
2. PEAK TJ = PDM x (ZθJC) +TC
10-2
10-1
FIGURE 11. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
VGS
RG
VDS
L
DUT
+
VDD
-
0V tP
ID
0.01Ω
FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT
VGS
tP tAV
10 V
0
IAS
ID 0
BVDSS
VDS
0
FIGURE 13. UNCLAMPED ENERGY WAVEFORMS
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HIP0061AS2.PDF ] | |
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