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PDF HIP0051IB Data sheet ( Hoja de datos )
| Número de pieza | HIP0051IB | |
| Descripción | 0.25A/50V Octal Low Side Power Driver with Serial Bus Control | |
| Fabricantes | Intersil Corporation | |
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HIP0051
June 1996
0.25A/50V Octal Low Side Power Driver
with Serial Bus Control
Features
Description
• Eight Open Drain - NDMOS Low Side Drivers Each
Capable of 250mA
• High Voltage Power BiMOS with Low Idle and Standby
Current
• Over-Voltage Clamp Protection
- Each Output . . . . . . . . . . . . . . . . . . . . . . . 50V Typical
• Serial Data Input, Parallel Output Power Drive
• Common Enable for Output Drivers and Data Storage
Register
• -40oC to 85oC Operating Range
Applications
• Automotive and Industrial Systems
• Solenoids, Relays and Lamp Drivers
• Logic and µP Controlled Drivers
The HIP0051 is a logic controlled, eight channel Octal Low
Side Power Driver. As shown in the Block Diagram, the
outputs are controlled via the serial data interface which
allows the data to be shifted out, allowing control of other
cascaded serial devices.
The HIP0051 is fabricated in a Power BiMOS IC process,
and is intended for use in automotive and other applications
having a wide range of temperature and electrical stress
conditions. It is particularly suited for driving lamps, displays,
relays, and solenoids in applications where low operating
power, high breakdown voltage, and high output current at
high temperature is required.
Ordering Information
PART
NUMBER
HIP0051IB
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 20 Ld SOIC
PKG.
NO.
M20.3
• Robotic Controls
Pinout
HIP0051
(SOIC)
TOP VIEW
GND 1
VCC 2
SI 3
DR0 4
DR1 5
DR2 6
DR3 7
NC 8
EN 9
GND 10
20 GND
19 LGND
18 SO
17 DR7
16 DR6
15 DR5
14 DR4
13 SCK
12 STR
11 GND
Block Diagram
EN
STR
SI
SCK
SO
(ENABLE)
(STROBE)
8-BIT
SERIAL
(SPI)
INPUT
REGISTER
(DATA IS
PARALLEL
OUTPUT
LATCHED
WHEN
STROBED)
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OUTPUT DRIVER
(CHANNEL 1 OF 8)
OUTPUT
LATCH
DR#0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4155
1 page  
HIP0051
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0926 0.1043 2.35
2.65
-
A1
0.0040 0.0118 0.10
0.30
-
B
0.013
0.0200 0.33
0.51
9
C
0.0091 0.0125 0.23
0.32
-
D
0.4961 0.5118 12.60
13.00
3
E
0.2914 0.2992 7.40
7.60
4
e 0.050 BSC
1.27 BSC
-
H
0.394
0.419 10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N 20
20 7
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
5
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