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PDF NLSX4014 Data sheet ( Hoja de datos )
| Número de pieza | NLSX4014 | |
| Descripción | Translator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NLSX4014
4-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX4014 is a 4−bit configurable dual−supply bidirectional
level translator without a direction control pin. The I/O VCC− and I/O
VL−ports are designed to track two different power supply rails, VCC
and VL respectively. The VCC supply rail is configurable from 1.3 V
to 4.5 V while the VL supply rail is configurable from 0.9 V to (VCC
− 0.4) V. This allows lower voltage logic signals on the VL side to be
translated into higher voltage logic signals on the VCC side, and
vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is
required.
The Output Enable (EN) input, when Low, disables both I/O ports
by putting them in 3−state. This significantly reduces the supply
currents from both VCC and VL. The EN signal is designed to track
VL.
Features
• Wide High−Side VCC Operating Range: 1.3 V to 4.5 V
Wide Low−Side VL Operating Range: 0.9 V to (VCC − 0.4) V
• Power Supply Isolation
♦ All Outputs are in the High Impedance State if Either VL or VCC
is at Ground
• High−Speed with 100 Mb/s Guaranteed Date Rate for VL > 1.6 V
• Low Bit−to−Bit Skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Powerup Sequencing
• Small packaging: 1.7 mm x 2.0 mm UQFN12
• These are Pb−Free Devices
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
http://onsemi.com
MARKING
DIAGRAMS
1
UQFN12
MU SUFFIX
CASE 523AE
WAMG
G
WA = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
14
1
SOIC−14
D SUFFIX
CASE 751A
14
1
NLSX4014G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
NLSX
4014
ALYWG
1G
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NLSX4014MUTAG UQFN12 3000/Tape & Reel
(Pb−Free)
NLSX4014DR2G
SO−14 2500/Tape & Reel
(Pb−Free)
NLSX4014DTR2G TSSOP14 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 3
1
Publication Order Number:
NLSX4014/D
Free Datasheet http://www.datasheet4u.com/
1 page  
NLSX4014
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
VIHC
I/O VCC Input HIGH
Voltage
VILC
I/O VCC Input LOW
Voltage
VIHL
I/O VL Input HIGH
Voltage
Test Conditions
(Note 1)
−405C to +855C
VCC (V)
(Note 2)
VL (V)
(Note 3)
Typ
Min (Note 4) Max
1.3 to 4.5 0.9 to (VCC – 0.4)
0.8 *
VCC
−
−
1.3 to 4.5 0.9 to (VCC – 0.4)
−
− 0.2 *
VCC
1.3 to 4.5 0.9 to (VCC – 0.4) 0.8 * VL
−
−
Unit
V
V
V
VILL I/O VL Input LOW
Voltage
1.3 to 4.5 0.9 to (VCC – 0.4)
−
− 0.2 * VL V
VIH Control Pin Input HIGH
Voltage
TA = +25°C
1.3 to 4.5 0.9 to (VCC – 0.4) 0.8 * VL
−
−V
VIL Control Pin Input LOW
Voltage
TA = +25°C
1.3 to 4.5 0.9 to (VCC – 0.4)
−
− 0.2 * VL V
VOHC
VOLC
VOHL
I/O VCC Output HIGH
Voltage
I/O VCC Output LOW
Voltage
I/O VL Output HIGH
Voltage
I/O VCC Source Current =
20 mA
I/O VCC Sink Current = 20 mA
1.3 to 4.5 0.9 to (VCC – 0.4)
1.3 to 4.5 0.9 to (VCC – 0.4)
0.8 *
VCC
−
I/O VL Source Current = 20 mA 1.3 to 4.5 0.9 to (VCC – 0.4) 0.8 * VL
−
−
−
−
0.2 *
VCC
−
V
V
V
VOLL I/O VL Output LOW
Voltage
I/O VL Sink Current = 20 mA 1.3 to 4.5 0.9 to (VCC – 0.4)
−
− 0.2 * VL V
1. Normal test conditions are VEN = 0 V, CIOVCC = 15 pF and CIOVL = 15 pF, unless otherwise specified.
2. VCC is the supply voltage associated with the high voltage port, and VCC ranges from +1.3 V to 4.5 V under normal operating conditions.
3. VL is the supply voltage associated with the low voltage port. VL must be less than or equal to (VCC – 0.4) V during normal operation. However,
during startup and shutdown conditions, VL can be greater than (VCC – 0.4) V.
4. Typical values are for VCC = +2.8 V, VL = +1.8 V and TA = +25°C. All units are production tested at TA = +25°C. Limits over the operating
temperature range are guaranteed by design.
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
NLSX4014
PACKAGE DIMENSIONS
UQFN12 1.7x2.0, 0.4P
CASE 523AE−01
ISSUE A
D
ÏÏÏÏPIN 1 REFERENCE
2X 0.10 C
AB
E
L1
DETAIL A
NOTE 5
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM TERMINAL TIP.
4. MOLD FLASH ALLOWED ON TERMINALS
ALONG EDGE OF PACKAGE. FLASH 0.03
MAX ON BOTTOM SURFACE OF
TERMINALS.
5. DETAIL A SHOWS OPTIONAL
CONSTRUCTION FOR TERMINALS.
2X 0.10 C TOP VIEW
0.05 C
DETAIL B
A
12X 0.05 C
A1
A3 SIDE VIEW
8X K
C
SEATING
PLANE
DETAIL B
OPTIONAL
CONSTRUCTION
MILLIMETERS
DIM MIN MAX
A 0.45 0.55
A1 0.00 0.05
A3 0.127 REF
b 0.15 0.25
D 1.70 BSC
E 2.00 BSC
e 0.40 BSC
K 0.20 ----
L 0.45 0.55
L1 0.00 0.03
L2 0.15 REF
5
DETAIL A
7
e
MOUNTING FOOTPRINT
SOLDERMASK DEFINED
1
12X L
11
L2
BOTTOM VIEW
12X b
0.10 M
0.05 M
CAB
C NOTE 3
1
0.32
2.30
11X
0.22
2.00
0.40
PITCH
12X
0.69
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet NLSX4014.PDF ] | |
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