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PDF NLSX3012 Data sheet ( Hoja de datos )
| Número de pieza | NLSX3012 | |
| Descripción | Translator | |
| Fabricantes | ON Semiconductor | |
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NLSX3012
2-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
The NLSX3012 is a 2−bit configurable dual−supply bidirectional
level translator without a direction control pin. The I/O VCC− and I/O
VL−ports are designed to track two different power supply rails, VCC
and VL respectively. The VCC supply rail is configurable from 1.3 V
to 4.5 V while the VL supply rail is configurable from 0.9 V to (VCC
− 0.4) V. This allows lower voltage logic signals on the VL side to be
translated into higher voltage logic signals on the VCC side, and
vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is
required.
The Output Enable (EN) input, when Low, disables both I/O ports
by putting them in 3−state. This significantly reduces the supply
currents from both VCC and VL. The EN signal is designed to track
VL.
Features
• Wide High−Side VCC Operating Range: 1.3 V to 4.5 V
Wide Low−Side VL Operating Range: 0.9 V to (VCC − 0.4) V
• High−Speed with 140 Mb/s Guaranteed Date Rate for VL > 1.8 V
• Low Bit−to−Bit Skew
• Overvoltage Tolerant Enable and I/O Pins
• Non−preferential Powerup Sequencing
• Small packaging: UDFN8, SO−8, Micro8
• This is a Pb−Free Device
Typical Applications
• Mobile Phones, PDAs, Other Portable Devices
• PC and Laptops
http://onsemi.com
MARKING
DIAGRAMS
8
1
UDFN8
MU SUFFIX
CASE 517AJ
VAM
G
VA = Specific Device Code
M = Date Code
G = Pb−Free Package
8
1
SO−8
D SUFFIX
CASE 751
8
SX3012
ALYW G
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
1
A
Y
W
G
Micro8
DM SUFFIX
CASE 846A
8
3012
AYW G
G
1
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
NLSX3012MUTAG
NLSX3012DR2G
Package
Shipping†
UDFN8 3000/Tape & Reel
(Pb−Free)
SO−8 2500/Tape & Reel
(Pb−Free)
NLSX3012DMR2G Micro8 4000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
December, 2009 − Rev. 1
1
Publication Order Number:
NLSX3012/D
Free Datasheet http://www.datasheet4u.com/
1 page  
NLSX3012
POWER CONSUMPTION
Symbol
Parameter
Test Conditions
(Note 5)
VCC (V)
(Note 6)
VL (V)
(Note 7)
IQ−VCC Supply Current from EN = VL; I/O VCCn = 0 V, I/O VLn = 0 V, 1.3 to 3.6 0.9 to (VCC – 0.4)
VCC I/O VCCn = VCC or I/O VLn = VL and Io = 0
IQ−VL Supply Current from EN = VL; I/O VCCn = 0 V, I/O VLn = 0 V, 1.3 to 3.6 0.9 to (VCC – 0.4)
VL I/O VCCn = VCC or I/O VLn = VL and Io = 0
EN = VL, I/O VCCn = 0 V, I/O VLn = 0 V,
I/O VCCn = VCC or I/O VLn = (VCC −
0.2 V) and Io = 0
< (VCC – 0.2)
ITS−VCC VCC Tristate Output
Mode Supply
Current
EN = 0 V
1.3 to 3.6 0.9 to (VCC – 0.4)
−405C to +855C
Min Typ Max
− − 1.0
− − 1.0
− − 2.0
− − 1.0
Unit
mA
mA
mA
ITS−VL
IOZ
IEN
VL Tristate Output
Mode Supply
Current
I/O Tristate Output
Mode Leakage
Current
Output Enable Pin
Input Current
EN = 0 V
EN = 0 V
EN = 0 V
EN = 0 V
−
1.3 to 3.6 0.9 to (VCC – 0.4)
VCC − 0.2
1.3 to 3.6 0.9 to (VCC – 0.4)
VCC – 0.2
1.3 to 3.6 0.9 to (VCC – 0.4)
−
−
−
−
−
− 0.2 mA
− 2.0
− 0.15 mA
− 2.0
− 1.0 mA
5. Normal test conditions are VEN = 0 V, CIOVCC = 15 pF and CIOVL = 15 pF, unless otherwise specified.
6. VCC is the supply voltage associated with the high voltage port, and VCC ranges from +1.3 V to 4.5 V under normal operating conditions.
7. VL is the supply voltage associated with the low voltage port. VL must be less than or equal to (VCC – 0.4) V during normal operation. However,
during startup and shutdown conditions, VL can be greater than (VCC – 0.4) V.
8. Typical values are for VCC = +2.8 V, VL = +1.8 V and TA = +25°C. All units are production tested at TA = +25°C. Limits over the operating
temperature range are guaranteed by design.
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
NLSX3012
PACKAGE DIMENSIONS
−X−
A
SO−8
CASE 751−07
ISSUE AJ
B
−Y−
−Z−
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45_
0.10 (0.004)
M
J
0.25 (0.010) M Z Y S X S
SOLDERING FOOTPRINT*
1.52
0.060
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
ǒ ǓSCALE 6:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NLSX3012.PDF ] | |
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